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xilinx_zynq: Added SPI controllers + flashes
Added the two SPI controllers to the zynq machine model. Attached two SPI flash devices to each controller. Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com> Acked-by: Peter Maydell <peter.maydell@linaro.org>
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@ -24,6 +24,9 @@
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#include "flash.h"
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#include "blockdev.h"
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#include "loader.h"
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#include "ssi.h"
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#define NUM_SPI_FLASHES 4
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#define FLASH_SIZE (64 * 1024 * 1024)
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#define FLASH_SECTOR_SIZE (128 * 1024)
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@ -46,6 +49,34 @@ static void gem_init(NICInfo *nd, uint32_t base, qemu_irq irq)
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sysbus_connect_irq(s, 0, irq);
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}
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static inline void zynq_init_spi_flashes(uint32_t base_addr, qemu_irq irq)
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{
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DeviceState *dev;
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SysBusDevice *busdev;
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SSIBus *spi;
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int i;
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dev = qdev_create(NULL, "xilinx,spips");
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qdev_init_nofail(dev);
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busdev = sysbus_from_qdev(dev);
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sysbus_mmio_map(busdev, 0, base_addr);
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sysbus_connect_irq(busdev, 0, irq);
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spi = (SSIBus *)qdev_get_child_bus(dev, "spi");
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for (i = 0; i < NUM_SPI_FLASHES; ++i) {
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qemu_irq cs_line;
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dev = ssi_create_slave_no_init(spi, "m25p80");
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qdev_prop_set_string(dev, "partname", "n25q128");
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qdev_init_nofail(dev);
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cs_line = qdev_get_gpio_in(dev, 0);
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sysbus_connect_irq(busdev, i+1, cs_line);
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}
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}
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static void zynq_init(ram_addr_t ram_size, const char *boot_device,
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const char *kernel_filename, const char *kernel_cmdline,
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const char *initrd_filename, const char *cpu_model)
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@ -113,6 +144,9 @@ static void zynq_init(ram_addr_t ram_size, const char *boot_device,
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pic[n] = qdev_get_gpio_in(dev, n);
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}
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zynq_init_spi_flashes(0xE0006000, pic[58-IRQ_OFFSET]);
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zynq_init_spi_flashes(0xE0007000, pic[81-IRQ_OFFSET]);
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sysbus_create_simple("cadence_uart", 0xE0000000, pic[59-IRQ_OFFSET]);
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sysbus_create_simple("cadence_uart", 0xE0001000, pic[82-IRQ_OFFSET]);
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