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RISC-V: linux-user support for RVE ABI

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This change checks elf_flags for EF_RISCV_RVE and if
present uses the RVE linux syscall ABI which uses t0
for the syscall number instead of a7.

Warn and exit if a non-RVE ABI binary is run on a
cpu with the RVE extension as it is incompatible.

Cc: Palmer Dabbelt <palmer@sifive.com>
Cc: Sagar Karandikar <sagark@eecs.berkeley.edu>
Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Cc: Alistair Francis <Alistair.Francis@wdc.com>
Co-authored-by: Kito Cheng <kito.cheng@gmail.com>
Co-authored-by: Michael Clark <mjc@sifive.com>
Signed-off-by: Michael Clark <mjc@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
This commit is contained in:
Kito Cheng 2019-03-16 01:20:46 +00:00 committed by Palmer Dabbelt
parent c02b78c7b4
commit 5836c3ecce
No known key found for this signature in database
GPG Key ID: EF4CA1502CCBAB41
3 changed files with 20 additions and 2 deletions
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15
linux-user/riscv/cpu_loop.c
View File

@ -18,8 +18,10 @@
*/
#include "qemu/osdep.h"
#include "qemu/error-report.h"
#include "qemu.h"
#include "cpu_loop-common.h"
#include "elf.h"
void cpu_loop(CPURISCVState *env)
{
@ -53,7 +55,8 @@ void cpu_loop(CPURISCVState *env)
ret = 0;
} else {
ret = do_syscall(env,
env->gpr[xA7],
env->gpr[(env->elf_flags & EF_RISCV_RVE)
? xT0 : xA7],
env->gpr[xA0],
env->gpr[xA1],
env->gpr[xA2],
@ -113,6 +116,16 @@ void cpu_loop(CPURISCVState *env)
void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs)
{
CPUState *cpu = ENV_GET_CPU(env);
TaskState *ts = cpu->opaque;
struct image_info *info = ts->info;
env->pc = regs->sepc;
env->gpr[xSP] = regs->sp;
env->elf_flags = info->elf_flags;
if ((env->misa & RVE) && !(env->elf_flags & EF_RISCV_RVE)) {
error_report("Incompatible ELF: RVE cpu requires RVE ABI binary");
exit(EXIT_FAILURE);
}
}

4
target/riscv/cpu.h
View File

@ -123,6 +123,10 @@ struct CPURISCVState {
uint32_t features;
#ifdef CONFIG_USER_ONLY
uint32_t elf_flags;
#endif
#ifndef CONFIG_USER_ONLY
target_ulong priv;
target_ulong resetvec;

3
target/riscv/cpu_user.h
View File

@ -10,4 +10,5 @@
#define xA4 14
#define xA5 15
#define xA6 16
#define xA7 17 /* syscall number goes here */
#define xA7 17 /* syscall number for RVI ABI */
#define xT0 5 /* syscall number for RVE ABI */