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hw/intc/arm_gicv3: Provide ich_num_aprs()
We previously open-coded the expression for the number of virtual APR registers and the assertion that it was not going to cause us to overflow the cs->ich_apr[] array. Factor this out into a new ich_num_aprs() function, for consistency with the icc_num_aprs() function we just added for the physical APR handling. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220512151457.3899052-7-peter.maydell@linaro.org Message-id: 20220506162129.2896966-6-peter.maydell@linaro.org
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@ -49,6 +49,14 @@ static inline int icv_min_vbpr(GICv3CPUState *cs)
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return 7 - cs->vprebits;
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}
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static inline int ich_num_aprs(GICv3CPUState *cs)
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{
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/* Return the number of virtual APR registers (1, 2, or 4) */
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int aprmax = 1 << (cs->vprebits - 5);
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assert(aprmax <= ARRAY_SIZE(cs->ich_apr[0]));
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return aprmax;
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}
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/* Simple accessor functions for LR fields */
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static uint32_t ich_lr_vintid(uint64_t lr)
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{
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@ -145,9 +153,7 @@ static int ich_highest_active_virt_prio(GICv3CPUState *cs)
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* in the ICH Active Priority Registers.
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*/
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int i;
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int aprmax = 1 << (cs->vprebits - 5);
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assert(aprmax <= ARRAY_SIZE(cs->ich_apr[0]));
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int aprmax = ich_num_aprs(cs);
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for (i = 0; i < aprmax; i++) {
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uint32_t apr = cs->ich_apr[GICV3_G0][i] |
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@ -1333,9 +1339,7 @@ static int icv_drop_prio(GICv3CPUState *cs)
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* 32 bits are actually relevant.
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*/
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int i;
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int aprmax = 1 << (cs->vprebits - 5);
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assert(aprmax <= ARRAY_SIZE(cs->ich_apr[0]));
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int aprmax = ich_num_aprs(cs);
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for (i = 0; i < aprmax; i++) {
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uint64_t *papr0 = &cs->ich_apr[GICV3_G0][i];
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