hw/intc/arm_gicv3: Provide ich_num_aprs()

We previously open-coded the expression for the number of virtual APR
registers and the assertion that it was not going to cause us to
overflow the cs->ich_apr[] array.  Factor this out into a new
ich_num_aprs() function, for consistency with the icc_num_aprs()
function we just added for the physical APR handling.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220512151457.3899052-7-peter.maydell@linaro.org
Message-id: 20220506162129.2896966-6-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell 2022-05-12 16:14:57 +01:00
parent 39f29e5993
commit 5d55f82767

View File

@ -49,6 +49,14 @@ static inline int icv_min_vbpr(GICv3CPUState *cs)
return 7 - cs->vprebits;
}
static inline int ich_num_aprs(GICv3CPUState *cs)
{
/* Return the number of virtual APR registers (1, 2, or 4) */
int aprmax = 1 << (cs->vprebits - 5);
assert(aprmax <= ARRAY_SIZE(cs->ich_apr[0]));
return aprmax;
}
/* Simple accessor functions for LR fields */
static uint32_t ich_lr_vintid(uint64_t lr)
{
@ -145,9 +153,7 @@ static int ich_highest_active_virt_prio(GICv3CPUState *cs)
* in the ICH Active Priority Registers.
*/
int i;
int aprmax = 1 << (cs->vprebits - 5);
assert(aprmax <= ARRAY_SIZE(cs->ich_apr[0]));
int aprmax = ich_num_aprs(cs);
for (i = 0; i < aprmax; i++) {
uint32_t apr = cs->ich_apr[GICV3_G0][i] |
@ -1333,9 +1339,7 @@ static int icv_drop_prio(GICv3CPUState *cs)
* 32 bits are actually relevant.
*/
int i;
int aprmax = 1 << (cs->vprebits - 5);
assert(aprmax <= ARRAY_SIZE(cs->ich_apr[0]));
int aprmax = ich_num_aprs(cs);
for (i = 0; i < aprmax; i++) {
uint64_t *papr0 = &cs->ich_apr[GICV3_G0][i];