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target-ppc: add vextu[bhw][lr]x instructions
vextublx: Vector Extract Unsigned Byte Left vextuhlx: Vector Extract Unsigned Halfword Left vextuwlx: Vector Extract Unsigned Word Left vextubrx: Vector Extract Unsigned Byte Right-Indexed VX-form vextuhrx: Vector Extract Unsigned Halfword Right-Indexed VX-form vextuwrx: Vector Extract Unsigned Word Right-Indexed VX-form Signed-off-by: Avinesh Kumar <avinesku@linux.vnet.ibm.com> Signed-off-by: Hariharan T.S. <hari@linux.vnet.ibm.com> [ implement using int128_rshift ] Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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@ -21,6 +21,7 @@
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#define PPC_CPU_H
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#include "qemu-common.h"
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#include "qemu/int128.h"
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//#define PPC_EMULATE_32BITS_HYPV
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@ -262,6 +263,7 @@ union ppc_avr_t {
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#ifdef CONFIG_INT128
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__uint128_t u128;
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#endif
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Int128 s128;
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};
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#if !defined(CONFIG_USER_ONLY)
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@ -361,6 +361,12 @@ DEF_HELPER_3(vpmsumb, void, avr, avr, avr)
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DEF_HELPER_3(vpmsumh, void, avr, avr, avr)
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DEF_HELPER_3(vpmsumw, void, avr, avr, avr)
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DEF_HELPER_3(vpmsumd, void, avr, avr, avr)
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DEF_HELPER_2(vextublx, tl, tl, avr)
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DEF_HELPER_2(vextuhlx, tl, tl, avr)
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DEF_HELPER_2(vextuwlx, tl, tl, avr)
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DEF_HELPER_2(vextubrx, tl, tl, avr)
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DEF_HELPER_2(vextuhrx, tl, tl, avr)
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DEF_HELPER_2(vextuwrx, tl, tl, avr)
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DEF_HELPER_2(vsbox, void, avr, avr)
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DEF_HELPER_3(vcipher, void, avr, avr, avr)
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@ -1773,6 +1773,42 @@ void helper_vlogefp(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *b)
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}
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}
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#if defined(HOST_WORDS_BIGENDIAN)
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#define VEXTU_X_DO(name, size, left) \
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target_ulong glue(helper_, name)(target_ulong a, ppc_avr_t *b) \
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{ \
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int index; \
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if (left) { \
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index = (a & 0xf) * 8; \
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} else { \
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index = ((15 - (a & 0xf) + 1) * 8) - size; \
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} \
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return int128_getlo(int128_rshift(b->s128, index)) & \
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MAKE_64BIT_MASK(0, size); \
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}
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#else
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#define VEXTU_X_DO(name, size, left) \
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target_ulong glue(helper_, name)(target_ulong a, ppc_avr_t *b) \
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{ \
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int index; \
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if (left) { \
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index = ((15 - (a & 0xf) + 1) * 8) - size; \
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} else { \
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index = (a & 0xf) * 8; \
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} \
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return int128_getlo(int128_rshift(b->s128, index)) & \
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MAKE_64BIT_MASK(0, size); \
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}
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#endif
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VEXTU_X_DO(vextublx, 8, 1)
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VEXTU_X_DO(vextuhlx, 16, 1)
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VEXTU_X_DO(vextuwlx, 32, 1)
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VEXTU_X_DO(vextubrx, 8, 0)
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VEXTU_X_DO(vextuhrx, 16, 0)
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VEXTU_X_DO(vextuwrx, 32, 0)
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#undef VEXTU_X_DO
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/* The specification says that the results are undefined if all of the
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* shift counts are not identical. We check to make sure that they are
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* to conform to what real hardware appears to do. */
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@ -340,6 +340,19 @@ static void glue(gen_, name0##_##name1)(DisasContext *ctx) \
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} \
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}
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#define GEN_VXFORM_HETRO(name, opc2, opc3) \
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static void glue(gen_, name)(DisasContext *ctx) \
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{ \
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TCGv_ptr rb; \
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if (unlikely(!ctx->altivec_enabled)) { \
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gen_exception(ctx, POWERPC_EXCP_VPU); \
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return; \
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} \
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rb = gen_avr_ptr(rB(ctx->opcode)); \
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gen_helper_##name(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], rb); \
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tcg_temp_free_ptr(rb); \
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}
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GEN_VXFORM(vaddubm, 0, 0);
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GEN_VXFORM_DUAL_EXT(vaddubm, PPC_ALTIVEC, PPC_NONE, 0, \
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vmul10cuq, PPC_NONE, PPC2_ISA300, 0x0000F800)
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@ -525,6 +538,16 @@ GEN_VXFORM_ENV(vaddfp, 5, 0);
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GEN_VXFORM_ENV(vsubfp, 5, 1);
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GEN_VXFORM_ENV(vmaxfp, 5, 16);
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GEN_VXFORM_ENV(vminfp, 5, 17);
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GEN_VXFORM_HETRO(vextublx, 6, 24)
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GEN_VXFORM_HETRO(vextuhlx, 6, 25)
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GEN_VXFORM_HETRO(vextuwlx, 6, 26)
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GEN_VXFORM_DUAL(vmrgow, PPC_NONE, PPC2_ALTIVEC_207,
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vextuwlx, PPC_NONE, PPC2_ISA300)
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GEN_VXFORM_HETRO(vextubrx, 6, 28)
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GEN_VXFORM_HETRO(vextuhrx, 6, 29)
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GEN_VXFORM_HETRO(vextuwrx, 6, 30)
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GEN_VXFORM_DUAL(vmrgew, PPC_NONE, PPC2_ALTIVEC_207, \
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vextuwrx, PPC_NONE, PPC2_ISA300)
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#define GEN_VXRFORM1(opname, name, str, opc2, opc3) \
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static void glue(gen_, name)(DisasContext *ctx) \
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@ -91,8 +91,12 @@ GEN_VXFORM(vmrghw, 6, 2),
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GEN_VXFORM(vmrglb, 6, 4),
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GEN_VXFORM(vmrglh, 6, 5),
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GEN_VXFORM(vmrglw, 6, 6),
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GEN_VXFORM_207(vmrgew, 6, 30),
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GEN_VXFORM_207(vmrgow, 6, 26),
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GEN_VXFORM_300(vextublx, 6, 24),
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GEN_VXFORM_300(vextuhlx, 6, 25),
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GEN_VXFORM_DUAL(vmrgow, vextuwlx, 6, 26, PPC_NONE, PPC2_ALTIVEC_207),
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GEN_VXFORM_300(vextubrx, 6, 28),
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GEN_VXFORM_300(vextuhrx, 6, 29),
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GEN_VXFORM_DUAL(vmrgew, vextuwrx, 6, 30, PPC_NONE, PPC2_ALTIVEC_207),
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GEN_VXFORM(vmuloub, 4, 0),
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GEN_VXFORM(vmulouh, 4, 1),
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GEN_VXFORM_DUAL(vmulouw, vmuluwm, 4, 2, PPC_ALTIVEC, PPC_NONE),
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