mirror of
https://github.com/xemu-project/xemu.git
synced 2024-11-23 19:49:43 +00:00
target-sh4: MMU: optimize UTLB accesses
With the current code, the QEMU TLB is setup to match the read/write mode of the MMU fault. This means when read access is done, the page is setup in read-only mode. When the page is later accessed in write mode, an MMU fault happened, and the page is switch in write-only mode. This flip-flop causes a lot of calls to the MMU code and slow down the emulation. This patch changes the MMU emulation, so that the QEMU TLB is setup to match the UTLB protection key. This impressively increase the speed of the emulation. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit is contained in:
parent
4d1e4ff63c
commit
628b61a072
@ -386,38 +386,28 @@ static int get_mmu_address(CPUState * env, target_ulong * physical,
|
||||
n = find_utlb_entry(env, address, use_asid);
|
||||
if (n >= 0) {
|
||||
matching = &env->utlb[n];
|
||||
switch ((matching->pr << 1) | ((env->sr & SR_MD) ? 1 : 0)) {
|
||||
case 0: /* 000 */
|
||||
case 2: /* 010 */
|
||||
n = (rw == 1) ? MMU_DTLB_VIOLATION_WRITE :
|
||||
MMU_DTLB_VIOLATION_READ;
|
||||
break;
|
||||
case 1: /* 001 */
|
||||
case 4: /* 100 */
|
||||
case 5: /* 101 */
|
||||
if (rw == 1)
|
||||
n = MMU_DTLB_VIOLATION_WRITE;
|
||||
else
|
||||
*prot = PAGE_READ;
|
||||
break;
|
||||
case 3: /* 011 */
|
||||
case 6: /* 110 */
|
||||
case 7: /* 111 */
|
||||
*prot = (rw == 1)? PAGE_WRITE : PAGE_READ;
|
||||
break;
|
||||
}
|
||||
if (!(env->sr & SR_MD) && !(matching->pr & 2)) {
|
||||
n = (rw == 1) ? MMU_DTLB_VIOLATION_WRITE :
|
||||
MMU_DTLB_VIOLATION_READ;
|
||||
} else if ((rw == 1) && !(matching->pr & 1)) {
|
||||
n = MMU_DTLB_VIOLATION_WRITE;
|
||||
} else if ((rw == 1) & !matching->d) {
|
||||
n = MMU_DTLB_INITIAL_WRITE;
|
||||
} else {
|
||||
*prot = PAGE_READ;
|
||||
if ((matching->pr & 1) && matching->d) {
|
||||
*prot |= PAGE_WRITE;
|
||||
}
|
||||
}
|
||||
} else if (n == MMU_DTLB_MISS) {
|
||||
n = (rw == 1) ? MMU_DTLB_MISS_WRITE :
|
||||
MMU_DTLB_MISS_READ;
|
||||
}
|
||||
}
|
||||
if (n >= 0) {
|
||||
n = MMU_OK;
|
||||
*physical = ((matching->ppn << 10) & ~(matching->size - 1)) |
|
||||
(address & (matching->size - 1));
|
||||
if ((rw == 1) & !matching->d)
|
||||
n = MMU_DTLB_INITIAL_WRITE;
|
||||
else
|
||||
n = MMU_OK;
|
||||
}
|
||||
return n;
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user