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target/arm: Untabify iwmmxt_helper.c
Untabify the arm iwmmxt_helper.c. This affects only the iwMMXt code. We've never touched that code in years, so it's not going to get fixed up by our "change when touched" process, and a bulk change is not going to be too disruptive. This commit was produced using Emacs "untabify" (plus one by-hand removal of a space to fix a checkpatch nit); it is a whitespace-only change. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20180821165215.29069-3-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell
parent
d00584b7cf
commit
67aed15551
@ -27,30 +27,30 @@
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/* iwMMXt macros extracted from GNU gdb. */
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/* Set the SIMD wCASF flags for 8, 16, 32 or 64-bit operations. */
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#define SIMD8_SET( v, n, b) ((v != 0) << ((((b) + 1) * 4) + (n)))
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#define SIMD16_SET(v, n, h) ((v != 0) << ((((h) + 1) * 8) + (n)))
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#define SIMD32_SET(v, n, w) ((v != 0) << ((((w) + 1) * 16) + (n)))
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#define SIMD64_SET(v, n) ((v != 0) << (32 + (n)))
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#define SIMD8_SET(v, n, b) ((v != 0) << ((((b) + 1) * 4) + (n)))
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#define SIMD16_SET(v, n, h) ((v != 0) << ((((h) + 1) * 8) + (n)))
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#define SIMD32_SET(v, n, w) ((v != 0) << ((((w) + 1) * 16) + (n)))
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#define SIMD64_SET(v, n) ((v != 0) << (32 + (n)))
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/* Flags to pass as "n" above. */
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#define SIMD_NBIT -1
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#define SIMD_ZBIT -2
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#define SIMD_CBIT -3
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#define SIMD_VBIT -4
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#define SIMD_NBIT -1
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#define SIMD_ZBIT -2
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#define SIMD_CBIT -3
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#define SIMD_VBIT -4
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/* Various status bit macros. */
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#define NBIT8(x) ((x) & 0x80)
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#define NBIT16(x) ((x) & 0x8000)
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#define NBIT32(x) ((x) & 0x80000000)
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#define NBIT64(x) ((x) & 0x8000000000000000ULL)
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#define ZBIT8(x) (((x) & 0xff) == 0)
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#define ZBIT16(x) (((x) & 0xffff) == 0)
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#define ZBIT32(x) (((x) & 0xffffffff) == 0)
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#define ZBIT64(x) (x == 0)
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#define NBIT8(x) ((x) & 0x80)
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#define NBIT16(x) ((x) & 0x8000)
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#define NBIT32(x) ((x) & 0x80000000)
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#define NBIT64(x) ((x) & 0x8000000000000000ULL)
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#define ZBIT8(x) (((x) & 0xff) == 0)
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#define ZBIT16(x) (((x) & 0xffff) == 0)
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#define ZBIT32(x) (((x) & 0xffffffff) == 0)
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#define ZBIT64(x) (x == 0)
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/* Sign extension macros. */
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#define EXTEND8H(a) ((uint16_t) (int8_t) (a))
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#define EXTEND8(a) ((uint32_t) (int8_t) (a))
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#define EXTEND16(a) ((uint32_t) (int16_t) (a))
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#define EXTEND16S(a) ((int32_t) (int16_t) (a))
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#define EXTEND32(a) ((uint64_t) (int32_t) (a))
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#define EXTEND8H(a) ((uint16_t) (int8_t) (a))
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#define EXTEND8(a) ((uint32_t) (int8_t) (a))
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#define EXTEND16(a) ((uint32_t) (int16_t) (a))
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#define EXTEND16S(a) ((int32_t) (int16_t) (a))
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#define EXTEND32(a) ((uint64_t) (int32_t) (a))
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uint64_t HELPER(iwmmxt_maddsq)(uint64_t a, uint64_t b)
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{
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@ -159,141 +159,141 @@ uint64_t HELPER(iwmmxt_macuw)(uint64_t a, uint64_t b)
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#define NZBIT64(x) \
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SIMD64_SET(NBIT64(x), SIMD_NBIT) | \
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SIMD64_SET(ZBIT64(x), SIMD_ZBIT)
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#define IWMMXT_OP_UNPACK(S, SH0, SH1, SH2, SH3) \
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#define IWMMXT_OP_UNPACK(S, SH0, SH1, SH2, SH3) \
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uint64_t HELPER(glue(iwmmxt_unpack, glue(S, b)))(CPUARMState *env, \
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uint64_t a, uint64_t b) \
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{ \
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a = \
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(((a >> SH0) & 0xff) << 0) | (((b >> SH0) & 0xff) << 8) | \
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(((a >> SH1) & 0xff) << 16) | (((b >> SH1) & 0xff) << 24) | \
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(((a >> SH2) & 0xff) << 32) | (((b >> SH2) & 0xff) << 40) | \
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(((a >> SH3) & 0xff) << 48) | (((b >> SH3) & 0xff) << 56); \
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env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \
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NZBIT8(a >> 0, 0) | NZBIT8(a >> 8, 1) | \
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NZBIT8(a >> 16, 2) | NZBIT8(a >> 24, 3) | \
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NZBIT8(a >> 32, 4) | NZBIT8(a >> 40, 5) | \
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NZBIT8(a >> 48, 6) | NZBIT8(a >> 56, 7); \
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{ \
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a = \
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(((a >> SH0) & 0xff) << 0) | (((b >> SH0) & 0xff) << 8) | \
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(((a >> SH1) & 0xff) << 16) | (((b >> SH1) & 0xff) << 24) | \
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(((a >> SH2) & 0xff) << 32) | (((b >> SH2) & 0xff) << 40) | \
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(((a >> SH3) & 0xff) << 48) | (((b >> SH3) & 0xff) << 56); \
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env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \
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NZBIT8(a >> 0, 0) | NZBIT8(a >> 8, 1) | \
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NZBIT8(a >> 16, 2) | NZBIT8(a >> 24, 3) | \
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NZBIT8(a >> 32, 4) | NZBIT8(a >> 40, 5) | \
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NZBIT8(a >> 48, 6) | NZBIT8(a >> 56, 7); \
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return a; \
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} \
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} \
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uint64_t HELPER(glue(iwmmxt_unpack, glue(S, w)))(CPUARMState *env, \
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uint64_t a, uint64_t b) \
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{ \
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a = \
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(((a >> SH0) & 0xffff) << 0) | \
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(((b >> SH0) & 0xffff) << 16) | \
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(((a >> SH2) & 0xffff) << 32) | \
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(((b >> SH2) & 0xffff) << 48); \
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env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \
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NZBIT8(a >> 0, 0) | NZBIT8(a >> 16, 1) | \
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NZBIT8(a >> 32, 2) | NZBIT8(a >> 48, 3); \
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{ \
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a = \
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(((a >> SH0) & 0xffff) << 0) | \
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(((b >> SH0) & 0xffff) << 16) | \
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(((a >> SH2) & 0xffff) << 32) | \
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(((b >> SH2) & 0xffff) << 48); \
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env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \
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NZBIT8(a >> 0, 0) | NZBIT8(a >> 16, 1) | \
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NZBIT8(a >> 32, 2) | NZBIT8(a >> 48, 3); \
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return a; \
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} \
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} \
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uint64_t HELPER(glue(iwmmxt_unpack, glue(S, l)))(CPUARMState *env, \
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uint64_t a, uint64_t b) \
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{ \
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a = \
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(((a >> SH0) & 0xffffffff) << 0) | \
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(((b >> SH0) & 0xffffffff) << 32); \
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env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \
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NZBIT32(a >> 0, 0) | NZBIT32(a >> 32, 1); \
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{ \
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a = \
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(((a >> SH0) & 0xffffffff) << 0) | \
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(((b >> SH0) & 0xffffffff) << 32); \
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env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \
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NZBIT32(a >> 0, 0) | NZBIT32(a >> 32, 1); \
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return a; \
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} \
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} \
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uint64_t HELPER(glue(iwmmxt_unpack, glue(S, ub)))(CPUARMState *env, \
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uint64_t x) \
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{ \
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x = \
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(((x >> SH0) & 0xff) << 0) | \
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(((x >> SH1) & 0xff) << 16) | \
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(((x >> SH2) & 0xff) << 32) | \
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(((x >> SH3) & 0xff) << 48); \
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env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \
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NZBIT16(x >> 0, 0) | NZBIT16(x >> 16, 1) | \
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NZBIT16(x >> 32, 2) | NZBIT16(x >> 48, 3); \
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{ \
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x = \
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(((x >> SH0) & 0xff) << 0) | \
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(((x >> SH1) & 0xff) << 16) | \
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(((x >> SH2) & 0xff) << 32) | \
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(((x >> SH3) & 0xff) << 48); \
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env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \
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NZBIT16(x >> 0, 0) | NZBIT16(x >> 16, 1) | \
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NZBIT16(x >> 32, 2) | NZBIT16(x >> 48, 3); \
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return x; \
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} \
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} \
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uint64_t HELPER(glue(iwmmxt_unpack, glue(S, uw)))(CPUARMState *env, \
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uint64_t x) \
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{ \
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x = \
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(((x >> SH0) & 0xffff) << 0) | \
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(((x >> SH2) & 0xffff) << 32); \
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env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \
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NZBIT32(x >> 0, 0) | NZBIT32(x >> 32, 1); \
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{ \
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x = \
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(((x >> SH0) & 0xffff) << 0) | \
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(((x >> SH2) & 0xffff) << 32); \
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env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \
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NZBIT32(x >> 0, 0) | NZBIT32(x >> 32, 1); \
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return x; \
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} \
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} \
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uint64_t HELPER(glue(iwmmxt_unpack, glue(S, ul)))(CPUARMState *env, \
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uint64_t x) \
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{ \
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x = (((x >> SH0) & 0xffffffff) << 0); \
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env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = NZBIT64(x >> 0); \
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{ \
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x = (((x >> SH0) & 0xffffffff) << 0); \
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env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = NZBIT64(x >> 0); \
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return x; \
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} \
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} \
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uint64_t HELPER(glue(iwmmxt_unpack, glue(S, sb)))(CPUARMState *env, \
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uint64_t x) \
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{ \
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x = \
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((uint64_t) EXTEND8H((x >> SH0) & 0xff) << 0) | \
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((uint64_t) EXTEND8H((x >> SH1) & 0xff) << 16) | \
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((uint64_t) EXTEND8H((x >> SH2) & 0xff) << 32) | \
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((uint64_t) EXTEND8H((x >> SH3) & 0xff) << 48); \
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env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \
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NZBIT16(x >> 0, 0) | NZBIT16(x >> 16, 1) | \
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NZBIT16(x >> 32, 2) | NZBIT16(x >> 48, 3); \
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{ \
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x = \
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((uint64_t) EXTEND8H((x >> SH0) & 0xff) << 0) | \
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((uint64_t) EXTEND8H((x >> SH1) & 0xff) << 16) | \
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((uint64_t) EXTEND8H((x >> SH2) & 0xff) << 32) | \
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((uint64_t) EXTEND8H((x >> SH3) & 0xff) << 48); \
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env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \
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NZBIT16(x >> 0, 0) | NZBIT16(x >> 16, 1) | \
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NZBIT16(x >> 32, 2) | NZBIT16(x >> 48, 3); \
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return x; \
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} \
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} \
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uint64_t HELPER(glue(iwmmxt_unpack, glue(S, sw)))(CPUARMState *env, \
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uint64_t x) \
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{ \
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x = \
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((uint64_t) EXTEND16((x >> SH0) & 0xffff) << 0) | \
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((uint64_t) EXTEND16((x >> SH2) & 0xffff) << 32); \
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env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \
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NZBIT32(x >> 0, 0) | NZBIT32(x >> 32, 1); \
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{ \
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x = \
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((uint64_t) EXTEND16((x >> SH0) & 0xffff) << 0) | \
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((uint64_t) EXTEND16((x >> SH2) & 0xffff) << 32); \
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env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \
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NZBIT32(x >> 0, 0) | NZBIT32(x >> 32, 1); \
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return x; \
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} \
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} \
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uint64_t HELPER(glue(iwmmxt_unpack, glue(S, sl)))(CPUARMState *env, \
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uint64_t x) \
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{ \
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x = EXTEND32((x >> SH0) & 0xffffffff); \
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env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = NZBIT64(x >> 0); \
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{ \
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x = EXTEND32((x >> SH0) & 0xffffffff); \
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env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = NZBIT64(x >> 0); \
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return x; \
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}
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IWMMXT_OP_UNPACK(l, 0, 8, 16, 24)
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IWMMXT_OP_UNPACK(h, 32, 40, 48, 56)
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#define IWMMXT_OP_CMP(SUFF, Tb, Tw, Tl, O) \
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#define IWMMXT_OP_CMP(SUFF, Tb, Tw, Tl, O) \
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uint64_t HELPER(glue(iwmmxt_, glue(SUFF, b)))(CPUARMState *env, \
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uint64_t a, uint64_t b) \
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{ \
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a = \
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CMP(0, Tb, O, 0xff) | CMP(8, Tb, O, 0xff) | \
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CMP(16, Tb, O, 0xff) | CMP(24, Tb, O, 0xff) | \
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CMP(32, Tb, O, 0xff) | CMP(40, Tb, O, 0xff) | \
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CMP(48, Tb, O, 0xff) | CMP(56, Tb, O, 0xff); \
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env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \
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NZBIT8(a >> 0, 0) | NZBIT8(a >> 8, 1) | \
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NZBIT8(a >> 16, 2) | NZBIT8(a >> 24, 3) | \
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NZBIT8(a >> 32, 4) | NZBIT8(a >> 40, 5) | \
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NZBIT8(a >> 48, 6) | NZBIT8(a >> 56, 7); \
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{ \
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a = \
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CMP(0, Tb, O, 0xff) | CMP(8, Tb, O, 0xff) | \
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CMP(16, Tb, O, 0xff) | CMP(24, Tb, O, 0xff) | \
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CMP(32, Tb, O, 0xff) | CMP(40, Tb, O, 0xff) | \
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CMP(48, Tb, O, 0xff) | CMP(56, Tb, O, 0xff); \
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env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \
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NZBIT8(a >> 0, 0) | NZBIT8(a >> 8, 1) | \
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NZBIT8(a >> 16, 2) | NZBIT8(a >> 24, 3) | \
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NZBIT8(a >> 32, 4) | NZBIT8(a >> 40, 5) | \
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NZBIT8(a >> 48, 6) | NZBIT8(a >> 56, 7); \
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return a; \
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} \
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} \
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uint64_t HELPER(glue(iwmmxt_, glue(SUFF, w)))(CPUARMState *env, \
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uint64_t a, uint64_t b) \
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{ \
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a = CMP(0, Tw, O, 0xffff) | CMP(16, Tw, O, 0xffff) | \
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CMP(32, Tw, O, 0xffff) | CMP(48, Tw, O, 0xffff); \
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env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \
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NZBIT16(a >> 0, 0) | NZBIT16(a >> 16, 1) | \
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NZBIT16(a >> 32, 2) | NZBIT16(a >> 48, 3); \
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{ \
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a = CMP(0, Tw, O, 0xffff) | CMP(16, Tw, O, 0xffff) | \
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CMP(32, Tw, O, 0xffff) | CMP(48, Tw, O, 0xffff); \
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env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \
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NZBIT16(a >> 0, 0) | NZBIT16(a >> 16, 1) | \
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NZBIT16(a >> 32, 2) | NZBIT16(a >> 48, 3); \
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return a; \
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} \
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} \
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uint64_t HELPER(glue(iwmmxt_, glue(SUFF, l)))(CPUARMState *env, \
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uint64_t a, uint64_t b) \
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{ \
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a = CMP(0, Tl, O, 0xffffffff) | \
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CMP(32, Tl, O, 0xffffffff); \
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env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \
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NZBIT32(a >> 0, 0) | NZBIT32(a >> 32, 1); \
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{ \
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a = CMP(0, Tl, O, 0xffffffff) | \
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CMP(32, Tl, O, 0xffffffff); \
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env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = \
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NZBIT32(a >> 0, 0) | NZBIT32(a >> 32, 1); \
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return a; \
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}
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#define CMP(SHR, TYPE, OPER, MASK) ((((TYPE) ((a >> SHR) & MASK) OPER \
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