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Trivial fixes (20191105-v3)
v3: remove disas/libvixl/vixl/invalset.h changes v2: remove patch from Greg that has lines with more than 80 columns -----BEGIN PGP SIGNATURE----- iQJGBAABCAAwFiEEzS913cjjpNwuT1Fz8ww4vT8vvjwFAl3C85ESHGxhdXJlbnRA dml2aWVyLmV1AAoJEPMMOL0/L748ULgP/jCT2BQNO9dmeijsG7eobcDzzwYUpFsW LjAeM/p5F31bE4UeFlzDE6YwvKt3Pjh0e/QNzOHGGkMrfOGh41zHjYS/WsnM8dZc djLUPJ1x0vw1oOstnmssdTlzDK01X6rMjRazw5XyzobhP8FeeJPlV4eUGdq5a7Ha In0kQi2P40eIP58EYOOiZxvO94Se1lnK7Z1oExcfxFe79G0R+ChWLOL3eUK0wnzw Klk1HgwpwDhcKQGYtQWbxN8+WZx5L4pzz/ZNm8rcM4o6gvk524f1u1vzPgDR1ZMU BFAs1SUEB6qINcm5if2pNESItVV/LC8nYyhsxhEHJy2tCuZScKhqQ0E1//qBZ9iA BasF3Xr06ePQw8KvdYQkL9qyztqWiaPCjsdQKgQ/zxtDBGG5//qGIcGgS1l488Yu xFrVJaYksLFHSMWunNjjARTZl1DMuBhzb2N3r05FPKmltpsU+UWU+9/PsqxSudWy oD+BZIQN37M0QKVjgeYdV4c9DEDjyFSU27H/mN+YOg2iNPSABv4Egw8zwtj6af37 I0f3RlJlsFX/WVPS/izrkZ4HbUR5MDn9I2QniGj5e/uKAuqy6Bs08fUrjorMtsA/ rHzdp9W8CThrejdf046TAP4ksSgo3m0wGCxNt/RnmsBDZeRBRn2IroPW8ePQWUAs 4jVnBfvvvm9a =Bu2Q -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-pull-request' into staging Trivial fixes (20191105-v3) v3: remove disas/libvixl/vixl/invalset.h changes v2: remove patch from Greg that has lines with more than 80 columns # gpg: Signature made Wed 06 Nov 2019 16:23:45 GMT # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/trivial-branch-pull-request: global: Squash 'the the' hw/misc/grlib_ahb_apb_pnp: Fix 8-bit accesses hw/misc/grlib_ahb_apb_pnp: Avoid crash when writing to PnP registers Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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commit
6a5d22083d
@ -10,7 +10,7 @@ can delegate implementation of persistent reservations to an external
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restricting access to block devices to specific initiators in a shared
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storage setup.
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For a more detailed reference please refer the the SCSI Primary
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For a more detailed reference please refer to the SCSI Primary
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Commands standard, specifically the section on Reservations and the
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"PERSISTENT RESERVE IN" and "PERSISTENT RESERVE OUT" commands.
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@ -385,7 +385,7 @@ Each LMB list entry consists of the following elements:
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is used to retrieve the right associativity list to be used for this
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LMB.
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- A 32bit flags word. The bit at bit position 0x00000008 defines whether
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the LMB is assigned to the the partition as of boot time.
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the LMB is assigned to the partition as of boot time.
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ibm,dynamic-memory-v2
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@ -163,7 +163,7 @@ Interrupt Priority Register (PIPR) is also updated using the IPB. This
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register represent the priority of the most favored pending
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notification.
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The PIPR is then compared to the the Current Processor Priority
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The PIPR is then compared to the Current Processor Priority
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Register (CPPR). If it is more favored (numerically less than), the
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CPU interrupt line is raised and the EO bit of the Notification Source
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Register (NSR) is updated to notify the presence of an exception for
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@ -89,7 +89,7 @@ TPM upon reboot. The PPI specification defines the operation requests and the
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actions the firmware has to take. The system administrator passes the operation
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request number to the firmware through an ACPI interface which writes this
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number to a memory location that the firmware knows. Upon reboot, the firmware
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finds the number and sends commands to the the TPM. The firmware writes the TPM
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finds the number and sends commands to the TPM. The firmware writes the TPM
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result code and the operation request number to a memory location that ACPI can
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read from and pass the result on to the administrator.
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@ -22,6 +22,7 @@
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*/
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#include "qemu/osdep.h"
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#include "qemu/log.h"
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#include "hw/sysbus.h"
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#include "hw/misc/grlib_ahb_apb_pnp.h"
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@ -231,9 +232,20 @@ static uint64_t grlib_apb_pnp_read(void *opaque, hwaddr offset, unsigned size)
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return apb_pnp->regs[offset >> 2];
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}
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static void grlib_apb_pnp_write(void *opaque, hwaddr addr,
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uint64_t val, unsigned size)
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{
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qemu_log_mask(LOG_UNIMP, "%s not implemented\n", __func__);
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}
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static const MemoryRegionOps grlib_apb_pnp_ops = {
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.read = grlib_apb_pnp_read,
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.write = grlib_apb_pnp_write,
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.endianness = DEVICE_BIG_ENDIAN,
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.impl = {
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.min_access_size = 4,
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.max_access_size = 4,
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},
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};
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static void grlib_apb_pnp_realize(DeviceState *dev, Error **errp)
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@ -341,7 +341,7 @@
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* access (even when it should be read-only). If the frontend hits the
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* maximum number of allowed persistently mapped grants, it can fallback
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* to non persistent mode. This will cause a performance degradation,
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* since the the backend driver will still try to map those grants
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* since the backend driver will still try to map those grants
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* persistently. Since the persistent grants protocol is compatible with
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* the previous protocol, a frontend driver can choose to work in
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* persistent mode even when the backend doesn't support it.
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@ -170,7 +170,7 @@ class ELF(object):
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self.ehdr.e_phnum += 1
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def to_file(self, elf_file):
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"""Writes all ELF structures to the the passed file.
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"""Writes all ELF structures to the passed file.
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Structure:
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Ehdr
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