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target/arm: Introduce sve_vqm1_for_el_sm
When Streaming SVE mode is enabled, the size is taken from SMCR_ELx instead of ZCR_ELx. The format is shared, but the set of vector lengths is not. Further, Streaming SVE does not require any particular length to be supported. Adjust sve_vqm1_for_el to pass the current value of PSTATE.SM to the new function. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220620175235.60881-19-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -1154,13 +1154,18 @@ int sve_exception_el(CPUARMState *env, int cur_el);
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int sme_exception_el(CPUARMState *env, int cur_el);
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int sme_exception_el(CPUARMState *env, int cur_el);
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/**
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/**
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* sve_vqm1_for_el:
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* sve_vqm1_for_el_sm:
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* @env: CPUARMState
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* @env: CPUARMState
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* @el: exception level
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* @el: exception level
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* @sm: streaming mode
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*
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*
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* Compute the current SVE vector length for @el, in units of
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* Compute the current vector length for @el & @sm, in units of
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* Quadwords Minus 1 -- the same scale used for ZCR_ELx.LEN.
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* Quadwords Minus 1 -- the same scale used for ZCR_ELx.LEN.
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* If @sm, compute for SVL, otherwise NVL.
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*/
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*/
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uint32_t sve_vqm1_for_el_sm(CPUARMState *env, int el, bool sm);
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/* Likewise, but using @sm = PSTATE.SM. */
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uint32_t sve_vqm1_for_el(CPUARMState *env, int el);
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uint32_t sve_vqm1_for_el(CPUARMState *env, int el);
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static inline bool is_a64(CPUARMState *env)
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static inline bool is_a64(CPUARMState *env)
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@ -6272,23 +6272,41 @@ int sme_exception_el(CPUARMState *env, int el)
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/*
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/*
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* Given that SVE is enabled, return the vector length for EL.
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* Given that SVE is enabled, return the vector length for EL.
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*/
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*/
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uint32_t sve_vqm1_for_el(CPUARMState *env, int el)
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uint32_t sve_vqm1_for_el_sm(CPUARMState *env, int el, bool sm)
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{
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{
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ARMCPU *cpu = env_archcpu(env);
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ARMCPU *cpu = env_archcpu(env);
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uint32_t len = cpu->sve_max_vq - 1;
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uint64_t *cr = env->vfp.zcr_el;
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uint32_t map = cpu->sve_vq.map;
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uint32_t len = ARM_MAX_VQ - 1;
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if (sm) {
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cr = env->vfp.smcr_el;
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map = cpu->sme_vq.map;
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}
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if (el <= 1 && !el_is_in_host(env, el)) {
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if (el <= 1 && !el_is_in_host(env, el)) {
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len = MIN(len, 0xf & (uint32_t)env->vfp.zcr_el[1]);
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len = MIN(len, 0xf & (uint32_t)cr[1]);
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}
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}
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if (el <= 2 && arm_feature(env, ARM_FEATURE_EL2)) {
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if (el <= 2 && arm_feature(env, ARM_FEATURE_EL2)) {
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len = MIN(len, 0xf & (uint32_t)env->vfp.zcr_el[2]);
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len = MIN(len, 0xf & (uint32_t)cr[2]);
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}
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}
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if (arm_feature(env, ARM_FEATURE_EL3)) {
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if (arm_feature(env, ARM_FEATURE_EL3)) {
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len = MIN(len, 0xf & (uint32_t)env->vfp.zcr_el[3]);
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len = MIN(len, 0xf & (uint32_t)cr[3]);
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}
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}
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len = 31 - clz32(cpu->sve_vq.map & MAKE_64BIT_MASK(0, len + 1));
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map &= MAKE_64BIT_MASK(0, len + 1);
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return len;
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if (map != 0) {
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return 31 - clz32(map);
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}
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/* Bit 0 is always set for Normal SVE -- not so for Streaming SVE. */
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assert(sm);
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return ctz32(cpu->sme_vq.map);
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}
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uint32_t sve_vqm1_for_el(CPUARMState *env, int el)
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{
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return sve_vqm1_for_el_sm(env, el, FIELD_EX64(env->svcr, SVCR, SM));
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}
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}
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static void zcr_write(CPUARMState *env, const ARMCPRegInfo *ri,
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static void zcr_write(CPUARMState *env, const ARMCPRegInfo *ri,
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