mirror of
https://github.com/xemu-project/xemu.git
synced 2024-11-24 03:59:52 +00:00
msf2: Add Emcraft's Smartfusion2 SOM kit
Emulated Emcraft's Smartfusion2 System On Module starter kit. Signed-off-by: Subbaraya Sundeep <sundeep.lkml@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20170920201737.25723-6-f4bug@amsat.org [PMD: drop cpu_model to directly use cpu type] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
parent
ebc1fbb4a1
commit
6d262dcb7d
@ -19,4 +19,4 @@ obj-$(CONFIG_FSL_IMX31) += fsl-imx31.o kzm.o
|
||||
obj-$(CONFIG_FSL_IMX6) += fsl-imx6.o sabrelite.o
|
||||
obj-$(CONFIG_ASPEED_SOC) += aspeed_soc.o aspeed.o
|
||||
obj-$(CONFIG_MPS2) += mps2.o
|
||||
obj-$(CONFIG_MSF2) += msf2-soc.o
|
||||
obj-$(CONFIG_MSF2) += msf2-soc.o msf2-som.o
|
||||
|
105
hw/arm/msf2-som.c
Normal file
105
hw/arm/msf2-som.c
Normal file
@ -0,0 +1,105 @@
|
||||
/*
|
||||
* SmartFusion2 SOM starter kit(from Emcraft) emulation.
|
||||
*
|
||||
* Copyright (c) 2017 Subbaraya Sundeep <sundeep.lkml@gmail.com>
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "qapi/error.h"
|
||||
#include "qemu/error-report.h"
|
||||
#include "hw/boards.h"
|
||||
#include "hw/arm/arm.h"
|
||||
#include "exec/address-spaces.h"
|
||||
#include "qemu/cutils.h"
|
||||
#include "hw/arm/msf2-soc.h"
|
||||
#include "cpu.h"
|
||||
|
||||
#define DDR_BASE_ADDRESS 0xA0000000
|
||||
#define DDR_SIZE (64 * M_BYTE)
|
||||
|
||||
#define M2S010_ENVM_SIZE (256 * K_BYTE)
|
||||
#define M2S010_ESRAM_SIZE (64 * K_BYTE)
|
||||
|
||||
static void emcraft_sf2_s2s010_init(MachineState *machine)
|
||||
{
|
||||
DeviceState *dev;
|
||||
DeviceState *spi_flash;
|
||||
MSF2State *soc;
|
||||
MachineClass *mc = MACHINE_GET_CLASS(machine);
|
||||
DriveInfo *dinfo = drive_get_next(IF_MTD);
|
||||
qemu_irq cs_line;
|
||||
SSIBus *spi_bus;
|
||||
MemoryRegion *sysmem = get_system_memory();
|
||||
MemoryRegion *ddr = g_new(MemoryRegion, 1);
|
||||
|
||||
if (strcmp(machine->cpu_type, mc->default_cpu_type) != 0) {
|
||||
error_report("This board can only be used with CPU %s",
|
||||
mc->default_cpu_type);
|
||||
}
|
||||
|
||||
memory_region_init_ram(ddr, NULL, "ddr-ram", DDR_SIZE,
|
||||
&error_fatal);
|
||||
memory_region_add_subregion(sysmem, DDR_BASE_ADDRESS, ddr);
|
||||
|
||||
dev = qdev_create(NULL, TYPE_MSF2_SOC);
|
||||
qdev_prop_set_string(dev, "part-name", "M2S010");
|
||||
qdev_prop_set_string(dev, "cpu-type", mc->default_cpu_type);
|
||||
|
||||
qdev_prop_set_uint64(dev, "eNVM-size", M2S010_ENVM_SIZE);
|
||||
qdev_prop_set_uint64(dev, "eSRAM-size", M2S010_ESRAM_SIZE);
|
||||
|
||||
/*
|
||||
* CPU clock and peripheral clocks(APB0, APB1)are configurable
|
||||
* in Libero. CPU clock is divided by APB0 and APB1 divisors for
|
||||
* peripherals. Emcraft's SoM kit comes with these settings by default.
|
||||
*/
|
||||
qdev_prop_set_uint32(dev, "m3clk", 142 * 1000000);
|
||||
qdev_prop_set_uint32(dev, "apb0div", 2);
|
||||
qdev_prop_set_uint32(dev, "apb1div", 2);
|
||||
|
||||
object_property_set_bool(OBJECT(dev), true, "realized", &error_fatal);
|
||||
|
||||
soc = MSF2_SOC(dev);
|
||||
|
||||
/* Attach SPI flash to SPI0 controller */
|
||||
spi_bus = (SSIBus *)qdev_get_child_bus(dev, "spi0");
|
||||
spi_flash = ssi_create_slave_no_init(spi_bus, "s25sl12801");
|
||||
qdev_prop_set_uint8(spi_flash, "spansion-cr2nv", 1);
|
||||
if (dinfo) {
|
||||
qdev_prop_set_drive(spi_flash, "drive", blk_by_legacy_dinfo(dinfo),
|
||||
&error_fatal);
|
||||
}
|
||||
qdev_init_nofail(spi_flash);
|
||||
cs_line = qdev_get_gpio_in_named(spi_flash, SSI_GPIO_CS, 0);
|
||||
sysbus_connect_irq(SYS_BUS_DEVICE(&soc->spi[0]), 1, cs_line);
|
||||
|
||||
armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename,
|
||||
soc->envm_size);
|
||||
}
|
||||
|
||||
static void emcraft_sf2_machine_init(MachineClass *mc)
|
||||
{
|
||||
mc->desc = "SmartFusion2 SOM kit from Emcraft (M2S010)";
|
||||
mc->init = emcraft_sf2_s2s010_init;
|
||||
mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m3");
|
||||
}
|
||||
|
||||
DEFINE_MACHINE("emcraft-sf2", emcraft_sf2_machine_init)
|
Loading…
Reference in New Issue
Block a user