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PPC: e500: convert SysBus init method to a realize method
Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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@ -436,8 +436,9 @@ static AddressSpace *e500_pcihost_set_iommu(PCIBus *bus, void *opaque,
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return &s->bm_as;
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return &s->bm_as;
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}
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}
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static int e500_pcihost_initfn(SysBusDevice *dev)
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static void e500_pcihost_realize(DeviceState *dev, Error **errp)
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{
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{
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SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
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PCIHostState *h;
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PCIHostState *h;
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PPCE500PCIState *s;
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PPCE500PCIState *s;
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PCIBus *b;
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PCIBus *b;
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@ -447,7 +448,7 @@ static int e500_pcihost_initfn(SysBusDevice *dev)
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s = PPC_E500_PCI_HOST_BRIDGE(dev);
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s = PPC_E500_PCI_HOST_BRIDGE(dev);
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for (i = 0; i < ARRAY_SIZE(s->irq); i++) {
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for (i = 0; i < ARRAY_SIZE(s->irq); i++) {
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sysbus_init_irq(dev, &s->irq[i]);
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sysbus_init_irq(sbd, &s->irq[i]);
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}
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}
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for (i = 0; i < PCI_NUM_PINS; i++) {
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for (i = 0; i < PCI_NUM_PINS; i++) {
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@ -460,7 +461,7 @@ static int e500_pcihost_initfn(SysBusDevice *dev)
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/* PIO lives at the bottom of our bus space */
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/* PIO lives at the bottom of our bus space */
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memory_region_add_subregion_overlap(&s->busmem, 0, &s->pio, -2);
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memory_region_add_subregion_overlap(&s->busmem, 0, &s->pio, -2);
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b = pci_register_root_bus(DEVICE(dev), NULL, mpc85xx_pci_set_irq,
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b = pci_register_root_bus(dev, NULL, mpc85xx_pci_set_irq,
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mpc85xx_pci_map_irq, s, &s->busmem, &s->pio,
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mpc85xx_pci_map_irq, s, &s->busmem, &s->pio,
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PCI_DEVFN(s->first_slot, 0), 4, TYPE_PCI_BUS);
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PCI_DEVFN(s->first_slot, 0), 4, TYPE_PCI_BUS);
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h->bus = b;
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h->bus = b;
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@ -483,10 +484,8 @@ static int e500_pcihost_initfn(SysBusDevice *dev)
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memory_region_add_subregion(&s->container, PCIE500_CFGADDR, &h->conf_mem);
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memory_region_add_subregion(&s->container, PCIE500_CFGADDR, &h->conf_mem);
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memory_region_add_subregion(&s->container, PCIE500_CFGDATA, &h->data_mem);
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memory_region_add_subregion(&s->container, PCIE500_CFGDATA, &h->data_mem);
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memory_region_add_subregion(&s->container, PCIE500_REG_BASE, &s->iomem);
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memory_region_add_subregion(&s->container, PCIE500_REG_BASE, &s->iomem);
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sysbus_init_mmio(dev, &s->container);
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sysbus_init_mmio(sbd, &s->container);
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pci_bus_set_route_irq_fn(b, e500_route_intx_pin_to_irq);
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pci_bus_set_route_irq_fn(b, e500_route_intx_pin_to_irq);
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return 0;
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}
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}
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static void e500_host_bridge_class_init(ObjectClass *klass, void *data)
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static void e500_host_bridge_class_init(ObjectClass *klass, void *data)
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@ -526,9 +525,8 @@ static Property pcihost_properties[] = {
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static void e500_pcihost_class_init(ObjectClass *klass, void *data)
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static void e500_pcihost_class_init(ObjectClass *klass, void *data)
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{
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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DeviceClass *dc = DEVICE_CLASS(klass);
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SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
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k->init = e500_pcihost_initfn;
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dc->realize = e500_pcihost_realize;
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set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
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set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
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dc->props = pcihost_properties;
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dc->props = pcihost_properties;
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dc->vmsd = &vmstate_ppce500_pci;
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dc->vmsd = &vmstate_ppce500_pci;
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