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Fix guest x86/amd64 helper_fprem/helper_fprem1, by Julian Seward.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2588 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -3139,30 +3139,51 @@ void helper_fprem1(void)
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CPU86_LDouble dblq, fpsrcop, fptemp;
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CPU86_LDoubleU fpsrcop1, fptemp1;
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int expdif;
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int q;
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signed long long int q;
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if (isinf(ST0) || isnan(ST0) || isnan(ST1) || (ST1 == 0.0)) {
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ST0 = 0.0 / 0.0; /* NaN */
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env->fpus &= (~0x4700); /* (C3,C2,C1,C0) <-- 0000 */
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return;
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}
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fpsrcop = ST0;
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fptemp = ST1;
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fpsrcop1.d = fpsrcop;
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fptemp1.d = fptemp;
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expdif = EXPD(fpsrcop1) - EXPD(fptemp1);
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if (expdif < 0) {
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/* optimisation? taken from the AMD docs */
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env->fpus &= (~0x4700); /* (C3,C2,C1,C0) <-- 0000 */
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/* ST0 is unchanged */
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return;
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}
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if (expdif < 53) {
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dblq = fpsrcop / fptemp;
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dblq = (dblq < 0.0)? ceil(dblq): floor(dblq);
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ST0 = fpsrcop - fptemp*dblq;
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q = (int)dblq; /* cutting off top bits is assumed here */
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/* round dblq towards nearest integer */
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dblq = rint(dblq);
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ST0 = fpsrcop - fptemp * dblq;
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/* convert dblq to q by truncating towards zero */
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if (dblq < 0.0)
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q = (signed long long int)(-dblq);
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else
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q = (signed long long int)dblq;
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env->fpus &= (~0x4700); /* (C3,C2,C1,C0) <-- 0000 */
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/* (C0,C1,C3) <-- (q2,q1,q0) */
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env->fpus |= (q&0x4) << 6; /* (C0) <-- q2 */
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env->fpus |= (q&0x2) << 8; /* (C1) <-- q1 */
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env->fpus |= (q&0x1) << 14; /* (C3) <-- q0 */
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/* (C0,C3,C1) <-- (q2,q1,q0) */
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env->fpus |= (q & 0x4) << (8 - 2); /* (C0) <-- q2 */
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env->fpus |= (q & 0x2) << (14 - 1); /* (C3) <-- q1 */
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env->fpus |= (q & 0x1) << (9 - 0); /* (C1) <-- q0 */
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} else {
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env->fpus |= 0x400; /* C2 <-- 1 */
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fptemp = pow(2.0, expdif-50);
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fptemp = pow(2.0, expdif - 50);
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fpsrcop = (ST0 / ST1) / fptemp;
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/* fpsrcop = integer obtained by rounding to the nearest */
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fpsrcop = (fpsrcop-floor(fpsrcop) < ceil(fpsrcop)-fpsrcop)?
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floor(fpsrcop): ceil(fpsrcop);
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/* fpsrcop = integer obtained by chopping */
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fpsrcop = (fpsrcop < 0.0) ?
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-(floor(fabs(fpsrcop))) : floor(fpsrcop);
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ST0 -= (ST1 * fpsrcop * fptemp);
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}
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}
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@ -3172,30 +3193,52 @@ void helper_fprem(void)
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CPU86_LDouble dblq, fpsrcop, fptemp;
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CPU86_LDoubleU fpsrcop1, fptemp1;
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int expdif;
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int q;
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fpsrcop = ST0;
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fptemp = ST1;
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signed long long int q;
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if (isinf(ST0) || isnan(ST0) || isnan(ST1) || (ST1 == 0.0)) {
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ST0 = 0.0 / 0.0; /* NaN */
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env->fpus &= (~0x4700); /* (C3,C2,C1,C0) <-- 0000 */
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return;
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}
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fpsrcop = (CPU86_LDouble)ST0;
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fptemp = (CPU86_LDouble)ST1;
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fpsrcop1.d = fpsrcop;
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fptemp1.d = fptemp;
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expdif = EXPD(fpsrcop1) - EXPD(fptemp1);
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if ( expdif < 53 ) {
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dblq = fpsrcop / fptemp;
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dblq = (dblq < 0.0)? ceil(dblq): floor(dblq);
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ST0 = fpsrcop - fptemp*dblq;
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q = (int)dblq; /* cutting off top bits is assumed here */
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if (expdif < 0) {
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/* optimisation? taken from the AMD docs */
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env->fpus &= (~0x4700); /* (C3,C2,C1,C0) <-- 0000 */
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/* (C0,C1,C3) <-- (q2,q1,q0) */
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env->fpus |= (q&0x4) << 6; /* (C0) <-- q2 */
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env->fpus |= (q&0x2) << 8; /* (C1) <-- q1 */
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env->fpus |= (q&0x1) << 14; /* (C3) <-- q0 */
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/* ST0 is unchanged */
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return;
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}
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if ( expdif < 53 ) {
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dblq = fpsrcop/*ST0*/ / fptemp/*ST1*/;
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/* round dblq towards zero */
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dblq = (dblq < 0.0) ? ceil(dblq) : floor(dblq);
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ST0 = fpsrcop/*ST0*/ - fptemp * dblq;
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/* convert dblq to q by truncating towards zero */
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if (dblq < 0.0)
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q = (signed long long int)(-dblq);
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else
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q = (signed long long int)dblq;
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env->fpus &= (~0x4700); /* (C3,C2,C1,C0) <-- 0000 */
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/* (C0,C3,C1) <-- (q2,q1,q0) */
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env->fpus |= (q & 0x4) << (8 - 2); /* (C0) <-- q2 */
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env->fpus |= (q & 0x2) << (14 - 1); /* (C3) <-- q1 */
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env->fpus |= (q & 0x1) << (9 - 0); /* (C1) <-- q0 */
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} else {
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int N = 32 + (expdif % 32); /* as per AMD docs */
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env->fpus |= 0x400; /* C2 <-- 1 */
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fptemp = pow(2.0, expdif-50);
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fptemp = pow(2.0, (double)(expdif - N));
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fpsrcop = (ST0 / ST1) / fptemp;
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/* fpsrcop = integer obtained by chopping */
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fpsrcop = (fpsrcop < 0.0)?
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-(floor(fabs(fpsrcop))): floor(fpsrcop);
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fpsrcop = (fpsrcop < 0.0) ?
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-(floor(fabs(fpsrcop))) : floor(fpsrcop);
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ST0 -= (ST1 * fpsrcop * fptemp);
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}
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}
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