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Allow attaching devices to OMAP UARTs.
Also avoid two signedness warnings in hw/omap2.c. The API to attach new devices to serials is fine, bu the implementation is a hack. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5263 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -660,6 +660,7 @@ struct omap_uart_s *omap2_uart_init(struct omap_target_agent_s *ta,
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qemu_irq irq, omap_clk fclk, omap_clk iclk,
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qemu_irq txdma, qemu_irq rxdma, CharDriverState *chr);
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void omap_uart_reset(struct omap_uart_s *s);
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void omap_uart_attach(struct omap_uart_s *s, CharDriverState *chr);
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struct omap_mpuio_s;
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struct omap_mpuio_s *omap_mpuio_init(target_phys_addr_t base,
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14
hw/omap1.c
14
hw/omap1.c
@ -1983,6 +1983,8 @@ struct omap_uart_s {
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SerialState *serial; /* TODO */
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struct omap_target_agent_s *ta;
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target_phys_addr_t base;
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omap_clk fclk;
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qemu_irq irq;
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uint8_t eblr;
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uint8_t syscontrol;
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@ -2007,6 +2009,9 @@ struct omap_uart_s *omap_uart_init(target_phys_addr_t base,
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struct omap_uart_s *s = (struct omap_uart_s *)
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qemu_mallocz(sizeof(struct omap_uart_s));
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s->base = base;
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s->fclk = fclk;
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s->irq = irq;
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s->serial = serial_mm_init(base, 2, irq, omap_clk_getrate(fclk)/16,
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chr ?: qemu_chr_open("null"), 1);
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@ -2108,13 +2113,20 @@ struct omap_uart_s *omap2_uart_init(struct omap_target_agent_s *ta,
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omap_uart_writefn, s);
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s->ta = ta;
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s->base = base;
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cpu_register_physical_memory(s->base + 0x20, 0x100, iomemtype);
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return s;
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}
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void omap_uart_attach(struct omap_uart_s *s, CharDriverState *chr)
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{
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/* TODO: Should reuse or destroy current s->serial */
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s->serial = serial_mm_init(s->base, 2, s->irq,
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omap_clk_getrate(s->fclk) / 16,
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chr ?: qemu_chr_open("null"), 1);
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}
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/* MPU Clock/Reset/Power Mode Control */
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static uint32_t omap_clkm_read(void *opaque, target_phys_addr_t addr)
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{
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@ -156,7 +156,7 @@ static inline void omap_gp_timer_trigger(struct omap_gp_timer_s *timer)
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{
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if (timer->pt)
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/* TODO in overflow-and-match mode if the first event to
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* occurs is the match, don't toggle. */
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* occur is the match, don't toggle. */
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omap_gp_timer_out(timer, !timer->out_val);
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else
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/* TODO inverted pulse on timer->out_val == 1? */
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@ -2151,12 +2151,12 @@ static void omap_sti_fifo_write(void *opaque, target_phys_addr_t addr,
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if (ch == STI_TRACE_CONTROL_CHANNEL) {
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/* Flush channel <i>value</i>. */
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qemu_chr_write(s->chr, "\r", 1);
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qemu_chr_write(s->chr, (const uint8_t *) "\r", 1);
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} else if (ch == STI_TRACE_CONSOLE_CHANNEL || 1) {
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if (value == 0xc0 || value == 0xc3) {
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/* Open channel <i>ch</i>. */
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} else if (value == 0x00)
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qemu_chr_write(s->chr, "\n", 1);
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qemu_chr_write(s->chr, (const uint8_t *) "\n", 1);
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else
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qemu_chr_write(s->chr, &byte, 1);
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}
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