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linux-user: Add HPPA startup and main loop
Including support for the atomic memory op syscalls. Signed-off-by: Richard Henderson <rth@twiddle.net>
This commit is contained in:
Richard Henderson
parent
1659e38e1d
commit
7c248bcda1
@ -1215,6 +1215,30 @@ static inline void init_thread(struct target_pt_regs *regs,
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#endif /* TARGET_TILEGX */
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#ifdef TARGET_HPPA
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#define ELF_START_MMAP 0x80000000
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#define ELF_CLASS ELFCLASS32
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#define ELF_ARCH EM_PARISC
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#define ELF_PLATFORM "PARISC"
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#define STACK_GROWS_DOWN 0
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#define STACK_ALIGNMENT 64
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static inline void init_thread(struct target_pt_regs *regs,
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struct image_info *infop)
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{
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regs->iaoq[0] = infop->entry;
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regs->iaoq[1] = infop->entry + 4;
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regs->gr[23] = 0;
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regs->gr[24] = infop->arg_start;
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regs->gr[25] = (infop->arg_end - infop->arg_start) / sizeof(abi_ulong);
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/* The top-of-stack contains a linkage buffer. */
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regs->gr[30] = infop->start_stack + 64;
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regs->gr[31] = infop->entry;
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}
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#endif /* TARGET_HPPA */
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#ifndef ELF_PLATFORM
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#define ELF_PLATFORM (NULL)
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#endif
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@ -3512,6 +3512,169 @@ void cpu_loop(CPUTLGState *env)
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#endif
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#ifdef TARGET_HPPA
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static abi_ulong hppa_lws(CPUHPPAState *env)
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{
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uint32_t which = env->gr[20];
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abi_ulong addr = env->gr[26];
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abi_ulong old = env->gr[25];
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abi_ulong new = env->gr[24];
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abi_ulong size, ret;
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switch (which) {
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default:
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return -TARGET_ENOSYS;
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case 0: /* elf32 atomic 32bit cmpxchg */
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if ((addr & 3) || !access_ok(VERIFY_WRITE, addr, 4)) {
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return -TARGET_EFAULT;
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}
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old = tswap32(old);
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new = tswap32(new);
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ret = atomic_cmpxchg((uint32_t *)g2h(addr), old, new);
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ret = tswap32(ret);
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break;
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case 2: /* elf32 atomic "new" cmpxchg */
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size = env->gr[23];
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if (size >= 4) {
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return -TARGET_ENOSYS;
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}
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if (((addr | old | new) & ((1 << size) - 1))
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|| !access_ok(VERIFY_WRITE, addr, 1 << size)
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|| !access_ok(VERIFY_READ, old, 1 << size)
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|| !access_ok(VERIFY_READ, new, 1 << size)) {
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return -TARGET_EFAULT;
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}
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/* Note that below we use host-endian loads so that the cmpxchg
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can be host-endian as well. */
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switch (size) {
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case 0:
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old = *(uint8_t *)g2h(old);
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new = *(uint8_t *)g2h(new);
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ret = atomic_cmpxchg((uint8_t *)g2h(addr), old, new);
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ret = ret != old;
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break;
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case 1:
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old = *(uint16_t *)g2h(old);
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new = *(uint16_t *)g2h(new);
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ret = atomic_cmpxchg((uint16_t *)g2h(addr), old, new);
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ret = ret != old;
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break;
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case 2:
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old = *(uint32_t *)g2h(old);
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new = *(uint32_t *)g2h(new);
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ret = atomic_cmpxchg((uint32_t *)g2h(addr), old, new);
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ret = ret != old;
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break;
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case 3:
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{
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uint64_t o64, n64, r64;
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o64 = *(uint64_t *)g2h(old);
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n64 = *(uint64_t *)g2h(new);
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#ifdef CONFIG_ATOMIC64
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r64 = atomic_cmpxchg__nocheck((uint64_t *)g2h(addr), o64, n64);
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ret = r64 != o64;
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#else
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start_exclusive();
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r64 = *(uint64_t *)g2h(addr);
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ret = 1;
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if (r64 == o64) {
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*(uint64_t *)g2h(addr) = n64;
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ret = 0;
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}
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end_exclusive();
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#endif
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}
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break;
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}
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break;
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}
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env->gr[28] = ret;
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return 0;
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}
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void cpu_loop(CPUHPPAState *env)
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{
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CPUState *cs = CPU(hppa_env_get_cpu(env));
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target_siginfo_t info;
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abi_ulong ret;
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int trapnr;
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while (1) {
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cpu_exec_start(cs);
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trapnr = cpu_exec(cs);
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cpu_exec_end(cs);
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process_queued_cpu_work(cs);
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switch (trapnr) {
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case EXCP_SYSCALL:
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ret = do_syscall(env, env->gr[20],
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env->gr[26], env->gr[25],
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env->gr[24], env->gr[23],
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env->gr[22], env->gr[21], 0, 0);
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switch (ret) {
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default:
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env->gr[28] = ret;
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/* We arrived here by faking the gateway page. Return. */
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env->iaoq_f = env->gr[31];
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env->iaoq_b = env->gr[31] + 4;
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break;
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case -TARGET_ERESTARTSYS:
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case -TARGET_QEMU_ESIGRETURN:
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break;
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}
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break;
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case EXCP_SYSCALL_LWS:
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env->gr[21] = hppa_lws(env);
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/* We arrived here by faking the gateway page. Return. */
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env->iaoq_f = env->gr[31];
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env->iaoq_b = env->gr[31] + 4;
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break;
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case EXCP_SIGSEGV:
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info.si_signo = TARGET_SIGSEGV;
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info.si_errno = 0;
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info.si_code = TARGET_SEGV_ACCERR;
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info._sifields._sigfault._addr = env->ior;
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queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
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break;
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case EXCP_SIGILL:
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info.si_signo = TARGET_SIGILL;
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info.si_errno = 0;
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info.si_code = TARGET_ILL_ILLOPN;
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info._sifields._sigfault._addr = env->iaoq_f;
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queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
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break;
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case EXCP_SIGFPE:
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info.si_signo = TARGET_SIGFPE;
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info.si_errno = 0;
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info.si_code = 0;
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info._sifields._sigfault._addr = env->iaoq_f;
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queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
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break;
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case EXCP_DEBUG:
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trapnr = gdb_handlesig(cs, TARGET_SIGTRAP);
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if (trapnr) {
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info.si_signo = trapnr;
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info.si_errno = 0;
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info.si_code = TARGET_TRAP_BRKPT;
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queue_signal(env, trapnr, QEMU_SI_FAULT, &info);
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}
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break;
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case EXCP_INTERRUPT:
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/* just indicate that signals should be handled asap */
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break;
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default:
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g_assert_not_reached();
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}
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process_pending_signals(env);
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}
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}
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#endif /* TARGET_HPPA */
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THREAD CPUState *thread_cpu;
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bool qemu_cpu_is_self(CPUState *cpu)
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@ -4539,6 +4702,15 @@ int main(int argc, char **argv, char **envp)
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}
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env->pc = regs->pc;
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}
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#elif defined(TARGET_HPPA)
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{
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int i;
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for (i = 1; i < 32; i++) {
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env->gr[i] = regs->gr[i];
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}
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env->iaoq_f = regs->iaoq[0];
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env->iaoq_b = regs->iaoq[1];
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}
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#else
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#error unsupported target CPU
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#endif
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