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dp8393x: Rewrite dp8393x_get() / dp8393x_put()

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Instead of accessing N registers via a single address_space API
call using a temporary buffer (stored in the device state) and
updating each register, move the address_space call in the
register put/get. The load/store and word size checks are moved
to put/get too. This simplifies a bit, making the code easier
to read.

Co-developed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Co-developed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Tested-by: Finn Thain <fthain@linux-m68k.org>
Message-Id: <20210710174954.2577195-8-f4bug@amsat.org>
This commit is contained in:
Philippe Mathieu-Daudé 2021-07-03 15:44:33 +02:00
parent 8ac2ffb584
commit 82adabf7e5
1 changed files with 63 additions and 97 deletions
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160
hw/net/dp8393x.c
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@ -163,7 +163,6 @@ struct dp8393xState {
/* Temporaries */ /* Temporaries */
uint8_t tx_buffer[0x10000]; uint8_t tx_buffer[0x10000];
uint16_t data[12];
int loopback_packet; int loopback_packet;
/* Memory access */ /* Memory access */
@ -220,34 +219,48 @@ static uint32_t dp8393x_wt(dp8393xState *s)
return s->regs[SONIC_WT1] << 16 | s->regs[SONIC_WT0]; return s->regs[SONIC_WT1] << 16 | s->regs[SONIC_WT0];
} }
static uint16_t dp8393x_get(dp8393xState *s, int width, int offset) static uint16_t dp8393x_get(dp8393xState *s, hwaddr addr, int offset)
{ {
const MemTxAttrs attrs = MEMTXATTRS_UNSPECIFIED;
uint16_t val; uint16_t val;
if (s->big_endian) { if (s->regs[SONIC_DCR] & SONIC_DCR_DW) {
val = be16_to_cpu(s->data[offset * width + width - 1]); addr += offset << 2;
if (s->big_endian) {
val = address_space_ldl_be(&s->as, addr, attrs, NULL);
} else {
val = address_space_ldl_le(&s->as, addr, attrs, NULL);
}
} else { } else {
val = le16_to_cpu(s->data[offset * width]); addr += offset << 1;
if (s->big_endian) {
val = address_space_lduw_be(&s->as, addr, attrs, NULL);
} else {
val = address_space_lduw_le(&s->as, addr, attrs, NULL);
}
} }
return val; return val;
} }
static void dp8393x_put(dp8393xState *s, int width, int offset, static void dp8393x_put(dp8393xState *s,
uint16_t val) hwaddr addr, int offset, uint16_t val)
{ {
if (s->big_endian) { const MemTxAttrs attrs = MEMTXATTRS_UNSPECIFIED;
if (width == 2) {
s->data[offset * 2] = 0; if (s->regs[SONIC_DCR] & SONIC_DCR_DW) {
s->data[offset * 2 + 1] = cpu_to_be16(val); addr += offset << 2;
if (s->big_endian) {
address_space_stl_be(&s->as, addr, val, attrs, NULL);
} else { } else {
s->data[offset] = cpu_to_be16(val); address_space_stl_le(&s->as, addr, val, attrs, NULL);
} }
} else { } else {
if (width == 2) { addr += offset << 1;
s->data[offset * 2] = cpu_to_le16(val); if (s->big_endian) {
s->data[offset * 2 + 1] = 0; address_space_stw_be(&s->as, addr, val, attrs, NULL);
} else { } else {
s->data[offset] = cpu_to_le16(val); address_space_stw_le(&s->as, addr, val, attrs, NULL);
} }
} }
} }
@ -278,12 +291,10 @@ static void dp8393x_do_load_cam(dp8393xState *s)
while (s->regs[SONIC_CDC] & 0x1f) { while (s->regs[SONIC_CDC] & 0x1f) {
/* Fill current entry */ /* Fill current entry */
address_space_read(&s->as, dp8393x_cdp(s), index = dp8393x_get(s, dp8393x_cdp(s), 0) & 0xf;
MEMTXATTRS_UNSPECIFIED, s->data, size); s->cam[index][0] = dp8393x_get(s, dp8393x_cdp(s), 1);
index = dp8393x_get(s, width, 0) & 0xf; s->cam[index][1] = dp8393x_get(s, dp8393x_cdp(s), 2);
s->cam[index][0] = dp8393x_get(s, width, 1); s->cam[index][2] = dp8393x_get(s, dp8393x_cdp(s), 3);
s->cam[index][1] = dp8393x_get(s, width, 2);
s->cam[index][2] = dp8393x_get(s, width, 3);
trace_dp8393x_load_cam(index, trace_dp8393x_load_cam(index,
s->cam[index][0] >> 8, s->cam[index][0] & 0xff, s->cam[index][0] >> 8, s->cam[index][0] & 0xff,
s->cam[index][1] >> 8, s->cam[index][1] & 0xff, s->cam[index][1] >> 8, s->cam[index][1] & 0xff,
@ -294,9 +305,7 @@ static void dp8393x_do_load_cam(dp8393xState *s)
} }
/* Read CAM enable */ /* Read CAM enable */
address_space_read(&s->as, dp8393x_cdp(s), s->regs[SONIC_CE] = dp8393x_get(s, dp8393x_cdp(s), 0);
MEMTXATTRS_UNSPECIFIED, s->data, size);
s->regs[SONIC_CE] = dp8393x_get(s, width, 0);
trace_dp8393x_load_cam_done(s->regs[SONIC_CE]); trace_dp8393x_load_cam_done(s->regs[SONIC_CE]);
/* Done */ /* Done */
@ -312,14 +321,12 @@ static void dp8393x_do_read_rra(dp8393xState *s)
/* Read memory */ /* Read memory */
width = (s->regs[SONIC_DCR] & SONIC_DCR_DW) ? 2 : 1; width = (s->regs[SONIC_DCR] & SONIC_DCR_DW) ? 2 : 1;
size = sizeof(uint16_t) * 4 * width; size = sizeof(uint16_t) * 4 * width;
address_space_read(&s->as, dp8393x_rrp(s),
MEMTXATTRS_UNSPECIFIED, s->data, size);
/* Update SONIC registers */ /* Update SONIC registers */
s->regs[SONIC_CRBA0] = dp8393x_get(s, width, 0); s->regs[SONIC_CRBA0] = dp8393x_get(s, dp8393x_rrp(s), 0);
s->regs[SONIC_CRBA1] = dp8393x_get(s, width, 1); s->regs[SONIC_CRBA1] = dp8393x_get(s, dp8393x_rrp(s), 1);
s->regs[SONIC_RBWC0] = dp8393x_get(s, width, 2); s->regs[SONIC_RBWC0] = dp8393x_get(s, dp8393x_rrp(s), 2);
s->regs[SONIC_RBWC1] = dp8393x_get(s, width, 3); s->regs[SONIC_RBWC1] = dp8393x_get(s, dp8393x_rrp(s), 3);
trace_dp8393x_read_rra_regs(s->regs[SONIC_CRBA0], s->regs[SONIC_CRBA1], trace_dp8393x_read_rra_regs(s->regs[SONIC_CRBA0], s->regs[SONIC_CRBA1],
s->regs[SONIC_RBWC0], s->regs[SONIC_RBWC1]); s->regs[SONIC_RBWC0], s->regs[SONIC_RBWC1]);
@ -415,28 +422,22 @@ static void dp8393x_do_receiver_disable(dp8393xState *s)
static void dp8393x_do_transmit_packets(dp8393xState *s) static void dp8393x_do_transmit_packets(dp8393xState *s)
{ {
NetClientState *nc = qemu_get_queue(s->nic); NetClientState *nc = qemu_get_queue(s->nic);
int width, size;
int tx_len, len; int tx_len, len;
uint16_t i; uint16_t i;
width = (s->regs[SONIC_DCR] & SONIC_DCR_DW) ? 2 : 1;
while (1) { while (1) {
/* Read memory */ /* Read memory */
size = sizeof(uint16_t) * 6 * width;
s->regs[SONIC_TTDA] = s->regs[SONIC_CTDA]; s->regs[SONIC_TTDA] = s->regs[SONIC_CTDA];
trace_dp8393x_transmit_packet(dp8393x_ttda(s)); trace_dp8393x_transmit_packet(dp8393x_ttda(s));
address_space_read(&s->as, dp8393x_ttda(s) + sizeof(uint16_t) * width,
MEMTXATTRS_UNSPECIFIED, s->data, size);
tx_len = 0; tx_len = 0;
/* Update registers */ /* Update registers */
s->regs[SONIC_TCR] = dp8393x_get(s, width, 0) & 0xf000; s->regs[SONIC_TCR] = dp8393x_get(s, dp8393x_ttda(s), 1) & 0xf000;
s->regs[SONIC_TPS] = dp8393x_get(s, width, 1); s->regs[SONIC_TPS] = dp8393x_get(s, dp8393x_ttda(s), 2);
s->regs[SONIC_TFC] = dp8393x_get(s, width, 2); s->regs[SONIC_TFC] = dp8393x_get(s, dp8393x_ttda(s), 3);
s->regs[SONIC_TSA0] = dp8393x_get(s, width, 3); s->regs[SONIC_TSA0] = dp8393x_get(s, dp8393x_ttda(s), 4);
s->regs[SONIC_TSA1] = dp8393x_get(s, width, 4); s->regs[SONIC_TSA1] = dp8393x_get(s, dp8393x_ttda(s), 5);
s->regs[SONIC_TFS] = dp8393x_get(s, width, 5); s->regs[SONIC_TFS] = dp8393x_get(s, dp8393x_ttda(s), 6);
/* Handle programmable interrupt */ /* Handle programmable interrupt */
if (s->regs[SONIC_TCR] & SONIC_TCR_PINT) { if (s->regs[SONIC_TCR] & SONIC_TCR_PINT) {
@ -458,15 +459,12 @@ static void dp8393x_do_transmit_packets(dp8393xState *s)
i++; i++;
if (i != s->regs[SONIC_TFC]) { if (i != s->regs[SONIC_TFC]) {
/* Read next fragment details */ /* Read next fragment details */
size = sizeof(uint16_t) * 3 * width; s->regs[SONIC_TSA0] = dp8393x_get(s, dp8393x_ttda(s),
address_space_read(&s->as, 4 + 3 * i);
dp8393x_ttda(s) s->regs[SONIC_TSA1] = dp8393x_get(s, dp8393x_ttda(s),
+ sizeof(uint16_t) * width * (4 + 3 * i), 5 + 3 * i);
MEMTXATTRS_UNSPECIFIED, s->data, s->regs[SONIC_TFS] = dp8393x_get(s, dp8393x_ttda(s),
size); 6 + 3 * i);
s->regs[SONIC_TSA0] = dp8393x_get(s, width, 0);
s->regs[SONIC_TSA1] = dp8393x_get(s, width, 1);
s->regs[SONIC_TFS] = dp8393x_get(s, width, 2);
} }
} }
@ -499,22 +497,12 @@ static void dp8393x_do_transmit_packets(dp8393xState *s)
s->regs[SONIC_TCR] |= SONIC_TCR_PTX; s->regs[SONIC_TCR] |= SONIC_TCR_PTX;
/* Write status */ /* Write status */
dp8393x_put(s, width, 0, dp8393x_put(s, dp8393x_ttda(s), 0, s->regs[SONIC_TCR] & 0x0fff);
s->regs[SONIC_TCR] & 0x0fff); /* status */
size = sizeof(uint16_t) * width;
address_space_write(&s->as, dp8393x_ttda(s),
MEMTXATTRS_UNSPECIFIED, s->data, size);
if (!(s->regs[SONIC_CR] & SONIC_CR_HTX)) { if (!(s->regs[SONIC_CR] & SONIC_CR_HTX)) {
/* Read footer of packet */ /* Read footer of packet */
size = sizeof(uint16_t) * width; s->regs[SONIC_CTDA] = dp8393x_get(s, dp8393x_ttda(s),
address_space_read(&s->as, 4 + 3 * s->regs[SONIC_TFC]);
dp8393x_ttda(s)
+ sizeof(uint16_t) * width
* (4 + 3 * s->regs[SONIC_TFC]),
MEMTXATTRS_UNSPECIFIED, s->data,
size);
s->regs[SONIC_CTDA] = dp8393x_get(s, width, 0);
if (s->regs[SONIC_CTDA] & SONIC_DESC_EOL) { if (s->regs[SONIC_CTDA] & SONIC_DESC_EOL) {
/* EOL detected */ /* EOL detected */
break; break;
@ -762,7 +750,7 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf,
dp8393xState *s = qemu_get_nic_opaque(nc); dp8393xState *s = qemu_get_nic_opaque(nc);
int packet_type; int packet_type;
uint32_t available, address; uint32_t available, address;
int width, rx_len, padded_len; int rx_len, padded_len;
uint32_t checksum; uint32_t checksum;
int size; int size;
@ -775,10 +763,8 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf,
rx_len = pkt_size + sizeof(checksum); rx_len = pkt_size + sizeof(checksum);
if (s->regs[SONIC_DCR] & SONIC_DCR_DW) { if (s->regs[SONIC_DCR] & SONIC_DCR_DW) {
width = 2;
padded_len = ((rx_len - 1) | 3) + 1; padded_len = ((rx_len - 1) | 3) + 1;
} else { } else {
width = 1;
padded_len = ((rx_len - 1) | 1) + 1; padded_len = ((rx_len - 1) | 1) + 1;
} }
@ -799,11 +785,7 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf,
/* Check for EOL */ /* Check for EOL */
if (s->regs[SONIC_LLFA] & SONIC_DESC_EOL) { if (s->regs[SONIC_LLFA] & SONIC_DESC_EOL) {
/* Are we still in resource exhaustion? */ /* Are we still in resource exhaustion? */
size = sizeof(uint16_t) * 1 * width; s->regs[SONIC_LLFA] = dp8393x_get(s, dp8393x_crda(s), 5);
address = dp8393x_crda(s) + sizeof(uint16_t) * 5 * width;
address_space_read(&s->as, address, MEMTXATTRS_UNSPECIFIED,
s->data, size);
s->regs[SONIC_LLFA] = dp8393x_get(s, width, 0);
if (s->regs[SONIC_LLFA] & SONIC_DESC_EOL) { if (s->regs[SONIC_LLFA] & SONIC_DESC_EOL) {
/* Still EOL ; stop reception */ /* Still EOL ; stop reception */
return -1; return -1;
@ -811,11 +793,7 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf,
/* Link has been updated by host */ /* Link has been updated by host */
/* Clear in_use */ /* Clear in_use */
size = sizeof(uint16_t) * width; dp8393x_put(s, dp8393x_crda(s), 6, 0x0000);
address = dp8393x_crda(s) + sizeof(uint16_t) * 6 * width;
dp8393x_put(s, width, 0, 0);
address_space_write(&s->as, address, MEMTXATTRS_UNSPECIFIED,
s->data, size);
/* Move to next descriptor */ /* Move to next descriptor */
s->regs[SONIC_CRDA] = s->regs[SONIC_LLFA]; s->regs[SONIC_CRDA] = s->regs[SONIC_LLFA];
@ -869,32 +847,20 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf,
/* Write status to memory */ /* Write status to memory */
trace_dp8393x_receive_write_status(dp8393x_crda(s)); trace_dp8393x_receive_write_status(dp8393x_crda(s));
dp8393x_put(s, width, 0, s->regs[SONIC_RCR]); /* status */ dp8393x_put(s, dp8393x_crda(s), 0, s->regs[SONIC_RCR]); /* status */
dp8393x_put(s, width, 1, rx_len); /* byte count */ dp8393x_put(s, dp8393x_crda(s), 1, rx_len); /* byte count */
dp8393x_put(s, width, 2, s->regs[SONIC_TRBA0]); /* pkt_ptr0 */ dp8393x_put(s, dp8393x_crda(s), 2, s->regs[SONIC_TRBA0]); /* pkt_ptr0 */
dp8393x_put(s, width, 3, s->regs[SONIC_TRBA1]); /* pkt_ptr1 */ dp8393x_put(s, dp8393x_crda(s), 3, s->regs[SONIC_TRBA1]); /* pkt_ptr1 */
dp8393x_put(s, width, 4, s->regs[SONIC_RSC]); /* seq_no */ dp8393x_put(s, dp8393x_crda(s), 4, s->regs[SONIC_RSC]); /* seq_no */
size = sizeof(uint16_t) * 5 * width;
address_space_write(&s->as, dp8393x_crda(s),
MEMTXATTRS_UNSPECIFIED,
s->data, size);
/* Check link field */ /* Check link field */
size = sizeof(uint16_t) * width; s->regs[SONIC_LLFA] = dp8393x_get(s, dp8393x_crda(s), 5);
address_space_read(&s->as,
dp8393x_crda(s) + sizeof(uint16_t) * 5 * width,
MEMTXATTRS_UNSPECIFIED, s->data, size);
s->regs[SONIC_LLFA] = dp8393x_get(s, width, 0);
if (s->regs[SONIC_LLFA] & SONIC_DESC_EOL) { if (s->regs[SONIC_LLFA] & SONIC_DESC_EOL) {
/* EOL detected */ /* EOL detected */
s->regs[SONIC_ISR] |= SONIC_ISR_RDE; s->regs[SONIC_ISR] |= SONIC_ISR_RDE;
} else { } else {
/* Clear in_use */ /* Clear in_use */
size = sizeof(uint16_t) * width; dp8393x_put(s, dp8393x_crda(s), 6, 0x0000);
address = dp8393x_crda(s) + sizeof(uint16_t) * 6 * width;
dp8393x_put(s, width, 0, 0);
address_space_write(&s->as, address, MEMTXATTRS_UNSPECIFIED,
s->data, size);
/* Move to next descriptor */ /* Move to next descriptor */
s->regs[SONIC_CRDA] = s->regs[SONIC_LLFA]; s->regs[SONIC_CRDA] = s->regs[SONIC_LLFA];