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dp8393x: Rewrite dp8393x_get() / dp8393x_put()
Instead of accessing N registers via a single address_space API call using a temporary buffer (stored in the device state) and updating each register, move the address_space call in the register put/get. The load/store and word size checks are moved to put/get too. This simplifies a bit, making the code easier to read. Co-developed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Co-developed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Finn Thain <fthain@linux-m68k.org> Message-Id: <20210710174954.2577195-8-f4bug@amsat.org>
This commit is contained in:
Philippe Mathieu-Daudé
parent
8ac2ffb584
commit
82adabf7e5
160
hw/net/dp8393x.c
160
hw/net/dp8393x.c
@ -163,7 +163,6 @@ struct dp8393xState {
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/* Temporaries */
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uint8_t tx_buffer[0x10000];
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uint16_t data[12];
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int loopback_packet;
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/* Memory access */
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@ -220,34 +219,48 @@ static uint32_t dp8393x_wt(dp8393xState *s)
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return s->regs[SONIC_WT1] << 16 | s->regs[SONIC_WT0];
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}
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static uint16_t dp8393x_get(dp8393xState *s, int width, int offset)
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static uint16_t dp8393x_get(dp8393xState *s, hwaddr addr, int offset)
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{
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const MemTxAttrs attrs = MEMTXATTRS_UNSPECIFIED;
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uint16_t val;
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if (s->big_endian) {
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val = be16_to_cpu(s->data[offset * width + width - 1]);
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if (s->regs[SONIC_DCR] & SONIC_DCR_DW) {
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addr += offset << 2;
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if (s->big_endian) {
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val = address_space_ldl_be(&s->as, addr, attrs, NULL);
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} else {
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val = address_space_ldl_le(&s->as, addr, attrs, NULL);
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}
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} else {
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val = le16_to_cpu(s->data[offset * width]);
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addr += offset << 1;
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if (s->big_endian) {
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val = address_space_lduw_be(&s->as, addr, attrs, NULL);
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} else {
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val = address_space_lduw_le(&s->as, addr, attrs, NULL);
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}
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}
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return val;
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}
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static void dp8393x_put(dp8393xState *s, int width, int offset,
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uint16_t val)
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static void dp8393x_put(dp8393xState *s,
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hwaddr addr, int offset, uint16_t val)
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{
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if (s->big_endian) {
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if (width == 2) {
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s->data[offset * 2] = 0;
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s->data[offset * 2 + 1] = cpu_to_be16(val);
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const MemTxAttrs attrs = MEMTXATTRS_UNSPECIFIED;
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if (s->regs[SONIC_DCR] & SONIC_DCR_DW) {
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addr += offset << 2;
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if (s->big_endian) {
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address_space_stl_be(&s->as, addr, val, attrs, NULL);
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} else {
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s->data[offset] = cpu_to_be16(val);
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address_space_stl_le(&s->as, addr, val, attrs, NULL);
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}
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} else {
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if (width == 2) {
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s->data[offset * 2] = cpu_to_le16(val);
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s->data[offset * 2 + 1] = 0;
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addr += offset << 1;
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if (s->big_endian) {
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address_space_stw_be(&s->as, addr, val, attrs, NULL);
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} else {
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s->data[offset] = cpu_to_le16(val);
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address_space_stw_le(&s->as, addr, val, attrs, NULL);
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}
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}
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}
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@ -278,12 +291,10 @@ static void dp8393x_do_load_cam(dp8393xState *s)
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while (s->regs[SONIC_CDC] & 0x1f) {
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/* Fill current entry */
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address_space_read(&s->as, dp8393x_cdp(s),
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MEMTXATTRS_UNSPECIFIED, s->data, size);
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index = dp8393x_get(s, width, 0) & 0xf;
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s->cam[index][0] = dp8393x_get(s, width, 1);
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s->cam[index][1] = dp8393x_get(s, width, 2);
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s->cam[index][2] = dp8393x_get(s, width, 3);
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index = dp8393x_get(s, dp8393x_cdp(s), 0) & 0xf;
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s->cam[index][0] = dp8393x_get(s, dp8393x_cdp(s), 1);
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s->cam[index][1] = dp8393x_get(s, dp8393x_cdp(s), 2);
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s->cam[index][2] = dp8393x_get(s, dp8393x_cdp(s), 3);
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trace_dp8393x_load_cam(index,
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s->cam[index][0] >> 8, s->cam[index][0] & 0xff,
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s->cam[index][1] >> 8, s->cam[index][1] & 0xff,
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@ -294,9 +305,7 @@ static void dp8393x_do_load_cam(dp8393xState *s)
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}
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/* Read CAM enable */
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address_space_read(&s->as, dp8393x_cdp(s),
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MEMTXATTRS_UNSPECIFIED, s->data, size);
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s->regs[SONIC_CE] = dp8393x_get(s, width, 0);
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s->regs[SONIC_CE] = dp8393x_get(s, dp8393x_cdp(s), 0);
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trace_dp8393x_load_cam_done(s->regs[SONIC_CE]);
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/* Done */
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@ -312,14 +321,12 @@ static void dp8393x_do_read_rra(dp8393xState *s)
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/* Read memory */
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width = (s->regs[SONIC_DCR] & SONIC_DCR_DW) ? 2 : 1;
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size = sizeof(uint16_t) * 4 * width;
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address_space_read(&s->as, dp8393x_rrp(s),
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MEMTXATTRS_UNSPECIFIED, s->data, size);
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/* Update SONIC registers */
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s->regs[SONIC_CRBA0] = dp8393x_get(s, width, 0);
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s->regs[SONIC_CRBA1] = dp8393x_get(s, width, 1);
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s->regs[SONIC_RBWC0] = dp8393x_get(s, width, 2);
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s->regs[SONIC_RBWC1] = dp8393x_get(s, width, 3);
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s->regs[SONIC_CRBA0] = dp8393x_get(s, dp8393x_rrp(s), 0);
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s->regs[SONIC_CRBA1] = dp8393x_get(s, dp8393x_rrp(s), 1);
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s->regs[SONIC_RBWC0] = dp8393x_get(s, dp8393x_rrp(s), 2);
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s->regs[SONIC_RBWC1] = dp8393x_get(s, dp8393x_rrp(s), 3);
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trace_dp8393x_read_rra_regs(s->regs[SONIC_CRBA0], s->regs[SONIC_CRBA1],
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s->regs[SONIC_RBWC0], s->regs[SONIC_RBWC1]);
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@ -415,28 +422,22 @@ static void dp8393x_do_receiver_disable(dp8393xState *s)
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static void dp8393x_do_transmit_packets(dp8393xState *s)
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{
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NetClientState *nc = qemu_get_queue(s->nic);
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int width, size;
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int tx_len, len;
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uint16_t i;
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width = (s->regs[SONIC_DCR] & SONIC_DCR_DW) ? 2 : 1;
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while (1) {
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/* Read memory */
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size = sizeof(uint16_t) * 6 * width;
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s->regs[SONIC_TTDA] = s->regs[SONIC_CTDA];
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trace_dp8393x_transmit_packet(dp8393x_ttda(s));
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address_space_read(&s->as, dp8393x_ttda(s) + sizeof(uint16_t) * width,
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MEMTXATTRS_UNSPECIFIED, s->data, size);
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tx_len = 0;
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/* Update registers */
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s->regs[SONIC_TCR] = dp8393x_get(s, width, 0) & 0xf000;
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s->regs[SONIC_TPS] = dp8393x_get(s, width, 1);
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s->regs[SONIC_TFC] = dp8393x_get(s, width, 2);
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s->regs[SONIC_TSA0] = dp8393x_get(s, width, 3);
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s->regs[SONIC_TSA1] = dp8393x_get(s, width, 4);
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s->regs[SONIC_TFS] = dp8393x_get(s, width, 5);
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s->regs[SONIC_TCR] = dp8393x_get(s, dp8393x_ttda(s), 1) & 0xf000;
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s->regs[SONIC_TPS] = dp8393x_get(s, dp8393x_ttda(s), 2);
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s->regs[SONIC_TFC] = dp8393x_get(s, dp8393x_ttda(s), 3);
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s->regs[SONIC_TSA0] = dp8393x_get(s, dp8393x_ttda(s), 4);
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s->regs[SONIC_TSA1] = dp8393x_get(s, dp8393x_ttda(s), 5);
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s->regs[SONIC_TFS] = dp8393x_get(s, dp8393x_ttda(s), 6);
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/* Handle programmable interrupt */
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if (s->regs[SONIC_TCR] & SONIC_TCR_PINT) {
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@ -458,15 +459,12 @@ static void dp8393x_do_transmit_packets(dp8393xState *s)
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i++;
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if (i != s->regs[SONIC_TFC]) {
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/* Read next fragment details */
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size = sizeof(uint16_t) * 3 * width;
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address_space_read(&s->as,
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dp8393x_ttda(s)
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+ sizeof(uint16_t) * width * (4 + 3 * i),
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MEMTXATTRS_UNSPECIFIED, s->data,
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size);
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s->regs[SONIC_TSA0] = dp8393x_get(s, width, 0);
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s->regs[SONIC_TSA1] = dp8393x_get(s, width, 1);
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s->regs[SONIC_TFS] = dp8393x_get(s, width, 2);
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s->regs[SONIC_TSA0] = dp8393x_get(s, dp8393x_ttda(s),
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4 + 3 * i);
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s->regs[SONIC_TSA1] = dp8393x_get(s, dp8393x_ttda(s),
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5 + 3 * i);
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s->regs[SONIC_TFS] = dp8393x_get(s, dp8393x_ttda(s),
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6 + 3 * i);
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}
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}
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@ -499,22 +497,12 @@ static void dp8393x_do_transmit_packets(dp8393xState *s)
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s->regs[SONIC_TCR] |= SONIC_TCR_PTX;
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/* Write status */
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dp8393x_put(s, width, 0,
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s->regs[SONIC_TCR] & 0x0fff); /* status */
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size = sizeof(uint16_t) * width;
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address_space_write(&s->as, dp8393x_ttda(s),
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MEMTXATTRS_UNSPECIFIED, s->data, size);
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dp8393x_put(s, dp8393x_ttda(s), 0, s->regs[SONIC_TCR] & 0x0fff);
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if (!(s->regs[SONIC_CR] & SONIC_CR_HTX)) {
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/* Read footer of packet */
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size = sizeof(uint16_t) * width;
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address_space_read(&s->as,
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dp8393x_ttda(s)
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+ sizeof(uint16_t) * width
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* (4 + 3 * s->regs[SONIC_TFC]),
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MEMTXATTRS_UNSPECIFIED, s->data,
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size);
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s->regs[SONIC_CTDA] = dp8393x_get(s, width, 0);
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s->regs[SONIC_CTDA] = dp8393x_get(s, dp8393x_ttda(s),
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4 + 3 * s->regs[SONIC_TFC]);
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if (s->regs[SONIC_CTDA] & SONIC_DESC_EOL) {
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/* EOL detected */
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break;
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@ -762,7 +750,7 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf,
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dp8393xState *s = qemu_get_nic_opaque(nc);
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int packet_type;
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uint32_t available, address;
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int width, rx_len, padded_len;
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int rx_len, padded_len;
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uint32_t checksum;
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int size;
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@ -775,10 +763,8 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf,
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rx_len = pkt_size + sizeof(checksum);
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if (s->regs[SONIC_DCR] & SONIC_DCR_DW) {
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width = 2;
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padded_len = ((rx_len - 1) | 3) + 1;
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} else {
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width = 1;
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padded_len = ((rx_len - 1) | 1) + 1;
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}
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@ -799,11 +785,7 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf,
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/* Check for EOL */
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if (s->regs[SONIC_LLFA] & SONIC_DESC_EOL) {
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/* Are we still in resource exhaustion? */
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size = sizeof(uint16_t) * 1 * width;
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address = dp8393x_crda(s) + sizeof(uint16_t) * 5 * width;
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address_space_read(&s->as, address, MEMTXATTRS_UNSPECIFIED,
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s->data, size);
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s->regs[SONIC_LLFA] = dp8393x_get(s, width, 0);
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s->regs[SONIC_LLFA] = dp8393x_get(s, dp8393x_crda(s), 5);
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if (s->regs[SONIC_LLFA] & SONIC_DESC_EOL) {
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/* Still EOL ; stop reception */
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return -1;
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@ -811,11 +793,7 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf,
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/* Link has been updated by host */
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/* Clear in_use */
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size = sizeof(uint16_t) * width;
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address = dp8393x_crda(s) + sizeof(uint16_t) * 6 * width;
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dp8393x_put(s, width, 0, 0);
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address_space_write(&s->as, address, MEMTXATTRS_UNSPECIFIED,
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s->data, size);
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dp8393x_put(s, dp8393x_crda(s), 6, 0x0000);
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/* Move to next descriptor */
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s->regs[SONIC_CRDA] = s->regs[SONIC_LLFA];
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@ -869,32 +847,20 @@ static ssize_t dp8393x_receive(NetClientState *nc, const uint8_t * buf,
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/* Write status to memory */
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trace_dp8393x_receive_write_status(dp8393x_crda(s));
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dp8393x_put(s, width, 0, s->regs[SONIC_RCR]); /* status */
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dp8393x_put(s, width, 1, rx_len); /* byte count */
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dp8393x_put(s, width, 2, s->regs[SONIC_TRBA0]); /* pkt_ptr0 */
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dp8393x_put(s, width, 3, s->regs[SONIC_TRBA1]); /* pkt_ptr1 */
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dp8393x_put(s, width, 4, s->regs[SONIC_RSC]); /* seq_no */
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size = sizeof(uint16_t) * 5 * width;
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address_space_write(&s->as, dp8393x_crda(s),
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MEMTXATTRS_UNSPECIFIED,
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s->data, size);
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dp8393x_put(s, dp8393x_crda(s), 0, s->regs[SONIC_RCR]); /* status */
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dp8393x_put(s, dp8393x_crda(s), 1, rx_len); /* byte count */
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dp8393x_put(s, dp8393x_crda(s), 2, s->regs[SONIC_TRBA0]); /* pkt_ptr0 */
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dp8393x_put(s, dp8393x_crda(s), 3, s->regs[SONIC_TRBA1]); /* pkt_ptr1 */
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dp8393x_put(s, dp8393x_crda(s), 4, s->regs[SONIC_RSC]); /* seq_no */
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/* Check link field */
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size = sizeof(uint16_t) * width;
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address_space_read(&s->as,
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dp8393x_crda(s) + sizeof(uint16_t) * 5 * width,
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MEMTXATTRS_UNSPECIFIED, s->data, size);
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s->regs[SONIC_LLFA] = dp8393x_get(s, width, 0);
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s->regs[SONIC_LLFA] = dp8393x_get(s, dp8393x_crda(s), 5);
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if (s->regs[SONIC_LLFA] & SONIC_DESC_EOL) {
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/* EOL detected */
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s->regs[SONIC_ISR] |= SONIC_ISR_RDE;
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} else {
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/* Clear in_use */
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size = sizeof(uint16_t) * width;
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address = dp8393x_crda(s) + sizeof(uint16_t) * 6 * width;
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dp8393x_put(s, width, 0, 0);
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address_space_write(&s->as, address, MEMTXATTRS_UNSPECIFIED,
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s->data, size);
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dp8393x_put(s, dp8393x_crda(s), 6, 0x0000);
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/* Move to next descriptor */
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s->regs[SONIC_CRDA] = s->regs[SONIC_LLFA];
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