mipsnet: use trace framework

Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
Hervé Poussineau 2011-09-04 22:29:27 +02:00 committed by Blue Swirl
parent d118d64a92
commit 83818f7cdd
2 changed files with 13 additions and 20 deletions

View File

@ -1,12 +1,8 @@
#include "hw.h"
#include "net.h"
#include "trace.h"
#include "sysbus.h"
//#define DEBUG_MIPSNET_SEND
//#define DEBUG_MIPSNET_RECEIVE
//#define DEBUG_MIPSNET_DATA
//#define DEBUG_MIPSNET_IRQ
/* MIPSnet register offsets */
#define MIPSNET_DEV_ID 0x00
@ -55,9 +51,7 @@ static void mipsnet_reset(MIPSnetState *s)
static void mipsnet_update_irq(MIPSnetState *s)
{
int isr = !!s->intctl;
#ifdef DEBUG_MIPSNET_IRQ
printf("mipsnet: Set IRQ to %d (%02x)\n", isr, s->intctl);
#endif
trace_mipsnet_irq(isr, s->intctl);
qemu_set_irq(s->irq, isr);
}
@ -81,9 +75,7 @@ static ssize_t mipsnet_receive(VLANClientState *nc, const uint8_t *buf, size_t s
{
MIPSnetState *s = DO_UPCAST(NICState, nc, nc)->opaque;
#ifdef DEBUG_MIPSNET_RECEIVE
printf("mipsnet: receiving len=%zu\n", size);
#endif
trace_mipsnet_receive(size);
if (!mipsnet_can_receive(nc))
return -1;
@ -146,9 +138,7 @@ static uint64_t mipsnet_ioport_read(void *opaque, target_phys_addr_t addr,
default:
break;
}
#ifdef DEBUG_MIPSNET_DATA
printf("mipsnet: read addr=0x%02x val=0x%02x\n", addr, ret);
#endif
trace_mipsnet_read(addr, ret);
return ret;
}
@ -158,9 +148,7 @@ static void mipsnet_ioport_write(void *opaque, target_phys_addr_t addr,
MIPSnetState *s = opaque;
addr &= 0x3f;
#ifdef DEBUG_MIPSNET_DATA
printf("mipsnet: write addr=0x%02x val=0x%02x\n", addr, val);
#endif
trace_mipsnet_write(addr, val);
switch (addr) {
case MIPSNET_TX_DATA_COUNT:
s->tx_count = (val <= MAX_ETH_FRAME_SIZE) ? val : 0;
@ -184,9 +172,7 @@ static void mipsnet_ioport_write(void *opaque, target_phys_addr_t addr,
s->tx_buffer[s->tx_written++] = val;
if (s->tx_written == s->tx_count) {
/* Send buffer. */
#ifdef DEBUG_MIPSNET_SEND
printf("mipsnet: sending len=%d\n", s->tx_count);
#endif
trace_mipsnet_send(s->tx_count);
qemu_send_packet(&s->nic->nc, s->tx_buffer, s->tx_count);
s->tx_count = s->tx_written = 0;
s->intctl |= MIPSNET_INTCTL_TXDONE;

View File

@ -450,6 +450,13 @@ milkymist_uart_pulse_irq_tx(void) "Pulse IRQ TX"
milkymist_vgafb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
milkymist_vgafb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
# hw/mipsnet.c
mipsnet_send(uint32_t size) "sending len=%u"
mipsnet_receive(uint32_t size) "receiving len=%u"
mipsnet_read(uint64_t addr, uint32_t val) "read addr=0x%" PRIx64 " val=0x%x"
mipsnet_write(uint64_t addr, uint64_t val) "write addr=0x%" PRIx64 " val=0x%" PRIx64
mipsnet_irq(uint32_t isr, uint32_t intctl) "set irq to %d (%02x)"
# xen-all.c
xen_ram_alloc(unsigned long ram_addr, unsigned long size) "requested: %#lx, size %#lx"
xen_client_set_memory(uint64_t start_addr, unsigned long size, unsigned long phys_offset, bool log_dirty) "%#"PRIx64" size %#lx, offset %#lx, log_dirty %i"