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Convert umul and smul to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4077 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -171,30 +171,6 @@
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#define FLAG_SET(x) ((env->psr&x)?1:0)
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void OPPROTO op_umul_T1_T0(void)
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{
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uint64_t res;
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res = (uint64_t) T0 * (uint64_t) T1;
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#ifdef TARGET_SPARC64
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T0 = res;
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#else
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T0 = res & 0xffffffff;
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#endif
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env->y = res >> 32;
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}
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void OPPROTO op_smul_T1_T0(void)
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{
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uint64_t res;
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res = (int64_t) ((int32_t) T0) * (int64_t) ((int32_t) T1);
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#ifdef TARGET_SPARC64
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T0 = res;
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#else
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T0 = res & 0xffffffff;
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#endif
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env->y = res >> 32;
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}
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void OPPROTO op_udiv_T1_T0(void)
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{
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uint64_t x0;
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@ -759,6 +759,54 @@ static inline void gen_op_mulscc_T1_T0(void)
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gen_cc_C_add(cpu_T[0], cpu_cc_src);
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}
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static inline void gen_op_umul_T1_T0(void)
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{
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TCGv r_temp, r_temp2;
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r_temp = tcg_temp_new(TCG_TYPE_I64);
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r_temp2 = tcg_temp_new(TCG_TYPE_I64);
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tcg_gen_extu_i32_i64(r_temp, cpu_T[1]);
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tcg_gen_extu_i32_i64(r_temp2, cpu_T[0]);
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tcg_gen_mul_i64(r_temp2, r_temp, r_temp2);
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tcg_gen_shri_i64(r_temp, r_temp2, 32);
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tcg_gen_trunc_i64_i32(r_temp, r_temp);
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tcg_gen_st_i32(r_temp, cpu_env, offsetof(CPUSPARCState, y));
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#ifdef TARGET_SPARC64
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tcg_gen_mov_i64(cpu_T[0], r_temp2);
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#else
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tcg_gen_trunc_i64_i32(cpu_T[0], r_temp2);
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#endif
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tcg_gen_discard_i64(r_temp);
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tcg_gen_discard_i64(r_temp2);
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}
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static inline void gen_op_smul_T1_T0(void)
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{
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TCGv r_temp, r_temp2;
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r_temp = tcg_temp_new(TCG_TYPE_I64);
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r_temp2 = tcg_temp_new(TCG_TYPE_I64);
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tcg_gen_ext32s_i64(r_temp, cpu_T[1]);
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tcg_gen_ext32s_i64(r_temp2, cpu_T[0]);
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tcg_gen_mul_i64(r_temp2, r_temp, r_temp2);
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tcg_gen_shri_i64(r_temp, r_temp2, 32);
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tcg_gen_trunc_i64_i32(r_temp, r_temp);
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tcg_gen_st_i32(r_temp, cpu_env, offsetof(CPUSPARCState, y));
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#ifdef TARGET_SPARC64
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tcg_gen_mov_i64(cpu_T[0], r_temp2);
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#else
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tcg_gen_trunc_i64_i32(cpu_T[0], r_temp2);
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#endif
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tcg_gen_discard_i64(r_temp);
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tcg_gen_discard_i64(r_temp2);
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}
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#ifdef TARGET_SPARC64
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static inline void gen_trap_ifdivzero_i64(TCGv divisor)
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{
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