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target/arm: Convert VFP VNMLA to decodetree
Convert the VFP VNMLA instruction to decodetree. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
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@ -1383,3 +1383,37 @@ static bool trans_VNMLS_dp(DisasContext *s, arg_VNMLS_sp *a)
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{
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return do_vfp_3op_dp(s, gen_VNMLS_dp, a->vd, a->vn, a->vm, true);
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}
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static void gen_VNMLA_sp(TCGv_i32 vd, TCGv_i32 vn, TCGv_i32 vm, TCGv_ptr fpst)
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{
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/* VNMLA: -fd + -(fn * fm) */
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TCGv_i32 tmp = tcg_temp_new_i32();
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gen_helper_vfp_muls(tmp, vn, vm, fpst);
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gen_helper_vfp_negs(tmp, tmp);
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gen_helper_vfp_negs(vd, vd);
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gen_helper_vfp_adds(vd, vd, tmp, fpst);
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tcg_temp_free_i32(tmp);
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}
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static bool trans_VNMLA_sp(DisasContext *s, arg_VNMLA_sp *a)
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{
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return do_vfp_3op_sp(s, gen_VNMLA_sp, a->vd, a->vn, a->vm, true);
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}
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static void gen_VNMLA_dp(TCGv_i64 vd, TCGv_i64 vn, TCGv_i64 vm, TCGv_ptr fpst)
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{
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/* VNMLA: -fd + (fn * fm) */
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TCGv_i64 tmp = tcg_temp_new_i64();
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gen_helper_vfp_muld(tmp, vn, vm, fpst);
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gen_helper_vfp_negd(tmp, tmp);
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gen_helper_vfp_negd(vd, vd);
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gen_helper_vfp_addd(vd, vd, tmp, fpst);
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tcg_temp_free_i64(tmp);
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}
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static bool trans_VNMLA_dp(DisasContext *s, arg_VNMLA_sp *a)
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{
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return do_vfp_3op_dp(s, gen_VNMLA_dp, a->vd, a->vn, a->vm, true);
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}
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@ -1393,16 +1393,6 @@ VFP_OP2(div)
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#undef VFP_OP2
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static inline void gen_vfp_F1_neg(int dp)
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{
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/* Like gen_vfp_neg() but put result in F1 */
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if (dp) {
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gen_helper_vfp_negd(cpu_F1d, cpu_F0d);
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} else {
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gen_helper_vfp_negs(cpu_F1s, cpu_F0s);
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}
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}
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static inline void gen_vfp_abs(int dp)
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{
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if (dp)
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@ -3122,7 +3112,7 @@ static int disas_vfp_insn(DisasContext *s, uint32_t insn)
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rn = VFP_SREG_N(insn);
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switch (op) {
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case 0 ... 2:
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case 0 ... 3:
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/* Already handled by decodetree */
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return 1;
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default:
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@ -3308,13 +3298,6 @@ static int disas_vfp_insn(DisasContext *s, uint32_t insn)
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for (;;) {
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/* Perform the calculation. */
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switch (op) {
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case 3: /* VNMLA: -fd + -(fn * fm) */
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gen_vfp_mul(dp);
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gen_vfp_F1_neg(dp);
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gen_mov_F0_vreg(dp, rd);
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gen_vfp_neg(dp);
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gen_vfp_add(dp);
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break;
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case 4: /* mul: fn * fm */
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gen_vfp_mul(dp);
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break;
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@ -112,3 +112,8 @@ VNMLS_sp ---- 1110 0.01 .... .... 1010 .0.0 .... \
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vm=%vm_sp vn=%vn_sp vd=%vd_sp
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VNMLS_dp ---- 1110 0.01 .... .... 1011 .0.0 .... \
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vm=%vm_dp vn=%vn_dp vd=%vd_dp
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VNMLA_sp ---- 1110 0.01 .... .... 1010 .1.0 .... \
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vm=%vm_sp vn=%vn_sp vd=%vd_sp
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VNMLA_dp ---- 1110 0.01 .... .... 1011 .1.0 .... \
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vm=%vm_dp vn=%vn_dp vd=%vd_dp
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