target-ppc: Introduce DFP Divide

Add emulation of the PowerPC Decimal Floating Point Divide instructions
ddiv[q][.]

Signed-off-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
This commit is contained in:
Tom Musta 2014-04-21 15:55:04 -05:00 committed by Alexander Graf
parent 8de6a1cc67
commit 9024ff40ba
3 changed files with 44 additions and 0 deletions

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@ -229,6 +229,13 @@ static void dfp_check_for_XX(struct PPC_DFP *dfp)
}
}
static void dfp_check_for_ZX(struct PPC_DFP *dfp)
{
if (dfp->context.status & DEC_Division_by_zero) {
dfp_set_FPSCR_flag(dfp, FP_ZX, FP_ZE);
}
}
static void dfp_check_for_VXSNAN(struct PPC_DFP *dfp)
{
if (dfp->context.status & DEC_Invalid_operation) {
@ -271,6 +278,22 @@ static void dfp_check_for_VXIMZ(struct PPC_DFP *dfp)
}
}
static void dfp_check_for_VXZDZ(struct PPC_DFP *dfp)
{
if (dfp->context.status & DEC_Division_undefined) {
dfp_set_FPSCR_flag(dfp, FP_VX | FP_VXZDZ, FP_VE);
}
}
static void dfp_check_for_VXIDI(struct PPC_DFP *dfp)
{
if (dfp->context.status & DEC_Invalid_operation) {
if (decNumberIsInfinite(&dfp->a) && decNumberIsInfinite(&dfp->b)) {
dfp_set_FPSCR_flag(dfp, FP_VX | FP_VXIDI, FP_VE);
}
}
}
#define DFP_HELPER_TAB(op, dnop, postprocs, size) \
void helper_##op(CPUPPCState *env, uint64_t *t, uint64_t *a, uint64_t *b) \
{ \
@ -325,3 +348,18 @@ static void MUL_PPs(struct PPC_DFP *dfp)
DFP_HELPER_TAB(dmul, decNumberMultiply, MUL_PPs, 64)
DFP_HELPER_TAB(dmulq, decNumberMultiply, MUL_PPs, 128)
static void DIV_PPs(struct PPC_DFP *dfp)
{
dfp_set_FPRF_from_FRT(dfp);
dfp_check_for_OX(dfp);
dfp_check_for_UX(dfp);
dfp_check_for_ZX(dfp);
dfp_check_for_XX(dfp);
dfp_check_for_VXSNAN(dfp);
dfp_check_for_VXZDZ(dfp);
dfp_check_for_VXIDI(dfp);
}
DFP_HELPER_TAB(ddiv, decNumberDivide, DIV_PPs, 64)
DFP_HELPER_TAB(ddivq, decNumberDivide, DIV_PPs, 128)

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@ -622,3 +622,5 @@ DEF_HELPER_4(dsub, void, env, fprp, fprp, fprp)
DEF_HELPER_4(dsubq, void, env, fprp, fprp, fprp)
DEF_HELPER_4(dmul, void, env, fprp, fprp, fprp)
DEF_HELPER_4(dmulq, void, env, fprp, fprp, fprp)
DEF_HELPER_4(ddiv, void, env, fprp, fprp, fprp)
DEF_HELPER_4(ddivq, void, env, fprp, fprp, fprp)

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@ -8362,6 +8362,8 @@ GEN_DFP_T_A_B_Rc(dsub)
GEN_DFP_T_A_B_Rc(dsubq)
GEN_DFP_T_A_B_Rc(dmul)
GEN_DFP_T_A_B_Rc(dmulq)
GEN_DFP_T_A_B_Rc(ddiv)
GEN_DFP_T_A_B_Rc(ddivq)
/*** SPE extension ***/
/* Register moves */
@ -11295,6 +11297,8 @@ GEN_DFP_T_A_B_Rc(dsub, 0x02, 0x10),
GEN_DFP_Tp_Ap_Bp_Rc(dsubq, 0x02, 0x10),
GEN_DFP_T_A_B_Rc(dmul, 0x02, 0x01),
GEN_DFP_Tp_Ap_Bp_Rc(dmulq, 0x02, 0x01),
GEN_DFP_T_A_B_Rc(ddiv, 0x02, 0x11),
GEN_DFP_Tp_Ap_Bp_Rc(ddivq, 0x02, 0x11),
#undef GEN_SPE
#define GEN_SPE(name0, name1, opc2, opc3, inval0, inval1, type) \
GEN_OPCODE_DUAL(name0##_##name1, 0x04, opc2, opc3, inval0, inval1, type, PPC_NONE)