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target-ppc: Introduce DFP Divide
Add emulation of the PowerPC Decimal Floating Point Divide instructions ddiv[q][.] Signed-off-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de>
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@ -229,6 +229,13 @@ static void dfp_check_for_XX(struct PPC_DFP *dfp)
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}
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}
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static void dfp_check_for_ZX(struct PPC_DFP *dfp)
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{
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if (dfp->context.status & DEC_Division_by_zero) {
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dfp_set_FPSCR_flag(dfp, FP_ZX, FP_ZE);
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}
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}
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static void dfp_check_for_VXSNAN(struct PPC_DFP *dfp)
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{
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if (dfp->context.status & DEC_Invalid_operation) {
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@ -271,6 +278,22 @@ static void dfp_check_for_VXIMZ(struct PPC_DFP *dfp)
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}
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}
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static void dfp_check_for_VXZDZ(struct PPC_DFP *dfp)
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{
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if (dfp->context.status & DEC_Division_undefined) {
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dfp_set_FPSCR_flag(dfp, FP_VX | FP_VXZDZ, FP_VE);
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}
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}
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static void dfp_check_for_VXIDI(struct PPC_DFP *dfp)
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{
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if (dfp->context.status & DEC_Invalid_operation) {
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if (decNumberIsInfinite(&dfp->a) && decNumberIsInfinite(&dfp->b)) {
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dfp_set_FPSCR_flag(dfp, FP_VX | FP_VXIDI, FP_VE);
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}
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}
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}
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#define DFP_HELPER_TAB(op, dnop, postprocs, size) \
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void helper_##op(CPUPPCState *env, uint64_t *t, uint64_t *a, uint64_t *b) \
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{ \
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@ -325,3 +348,18 @@ static void MUL_PPs(struct PPC_DFP *dfp)
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DFP_HELPER_TAB(dmul, decNumberMultiply, MUL_PPs, 64)
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DFP_HELPER_TAB(dmulq, decNumberMultiply, MUL_PPs, 128)
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static void DIV_PPs(struct PPC_DFP *dfp)
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{
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dfp_set_FPRF_from_FRT(dfp);
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dfp_check_for_OX(dfp);
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dfp_check_for_UX(dfp);
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dfp_check_for_ZX(dfp);
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dfp_check_for_XX(dfp);
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dfp_check_for_VXSNAN(dfp);
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dfp_check_for_VXZDZ(dfp);
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dfp_check_for_VXIDI(dfp);
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}
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DFP_HELPER_TAB(ddiv, decNumberDivide, DIV_PPs, 64)
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DFP_HELPER_TAB(ddivq, decNumberDivide, DIV_PPs, 128)
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@ -622,3 +622,5 @@ DEF_HELPER_4(dsub, void, env, fprp, fprp, fprp)
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DEF_HELPER_4(dsubq, void, env, fprp, fprp, fprp)
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DEF_HELPER_4(dmul, void, env, fprp, fprp, fprp)
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DEF_HELPER_4(dmulq, void, env, fprp, fprp, fprp)
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DEF_HELPER_4(ddiv, void, env, fprp, fprp, fprp)
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DEF_HELPER_4(ddivq, void, env, fprp, fprp, fprp)
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@ -8362,6 +8362,8 @@ GEN_DFP_T_A_B_Rc(dsub)
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GEN_DFP_T_A_B_Rc(dsubq)
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GEN_DFP_T_A_B_Rc(dmul)
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GEN_DFP_T_A_B_Rc(dmulq)
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GEN_DFP_T_A_B_Rc(ddiv)
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GEN_DFP_T_A_B_Rc(ddivq)
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/*** SPE extension ***/
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/* Register moves */
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@ -11295,6 +11297,8 @@ GEN_DFP_T_A_B_Rc(dsub, 0x02, 0x10),
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GEN_DFP_Tp_Ap_Bp_Rc(dsubq, 0x02, 0x10),
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GEN_DFP_T_A_B_Rc(dmul, 0x02, 0x01),
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GEN_DFP_Tp_Ap_Bp_Rc(dmulq, 0x02, 0x01),
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GEN_DFP_T_A_B_Rc(ddiv, 0x02, 0x11),
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GEN_DFP_Tp_Ap_Bp_Rc(ddivq, 0x02, 0x11),
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#undef GEN_SPE
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#define GEN_SPE(name0, name1, opc2, opc3, inval0, inval1, type) \
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GEN_OPCODE_DUAL(name0##_##name1, 0x04, opc2, opc3, inval0, inval1, type, PPC_NONE)
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