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hw/arm/strongarm: Fix handling of GPSR/GPCR reads
The StrongARM GPIO GPSR and GPCR registers are write-only, with reads being undefined behaviour. Instead of having GPCR return 31337 and GPSR return the value last written, make both log the guest error and return 0. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
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@ -480,7 +480,6 @@ struct StrongARMGPIOInfo {
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uint32_t rising;
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uint32_t falling;
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uint32_t status;
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uint32_t gpsr;
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uint32_t gafr;
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uint32_t prev_level;
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@ -544,14 +543,14 @@ static uint64_t strongarm_gpio_read(void *opaque, hwaddr offset,
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return s->dir;
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case GPSR: /* GPIO Pin-Output Set registers */
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DPRINTF("%s: Read from a write-only register 0x" TARGET_FMT_plx "\n",
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__func__, offset);
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return s->gpsr; /* Return last written value. */
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qemu_log_mask(LOG_GUEST_ERROR,
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"strongarm GPIO: read from write only register GPSR\n");
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return 0;
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case GPCR: /* GPIO Pin-Output Clear registers */
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DPRINTF("%s: Read from a write-only register 0x" TARGET_FMT_plx "\n",
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__func__, offset);
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return 31337; /* Specified as unpredictable in the docs. */
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qemu_log_mask(LOG_GUEST_ERROR,
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"strongarm GPIO: read from write only register GPCR\n");
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return 0;
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case GRER: /* GPIO Rising-Edge Detect Enable registers */
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return s->rising;
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@ -590,7 +589,6 @@ static void strongarm_gpio_write(void *opaque, hwaddr offset,
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case GPSR: /* GPIO Pin-Output Set registers */
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s->olevel |= value;
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strongarm_gpio_handler_update(s);
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s->gpsr = value;
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break;
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case GPCR: /* GPIO Pin-Output Clear registers */
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