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https://github.com/xemu-project/xemu.git
synced 2024-11-24 03:59:52 +00:00
support of long calls for PPC (malc)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4629 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
parent
da260249a4
commit
932a690969
17
exec-all.h
17
exec-all.h
@ -187,12 +187,23 @@ extern int code_gen_max_blocks;
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static inline void tb_set_jmp_target1(unsigned long jmp_addr, unsigned long addr)
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{
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uint32_t val, *ptr;
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long disp = addr - jmp_addr;
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/* patch the branch destination */
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ptr = (uint32_t *)jmp_addr;
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val = *ptr;
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val = (val & ~0x03fffffc) | ((addr - jmp_addr) & 0x03fffffc);
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*ptr = val;
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if ((disp << 6) >> 6 != disp) {
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uint16_t *p1;
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p1 = (uint16_t *) ptr;
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*ptr = (val & ~0x03fffffc) | 4;
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p1[3] = addr >> 16;
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p1[5] = addr & 0xffff;
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} else {
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/* patch the branch destination */
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val = (val & ~0x03fffffc) | (disp & 0x03fffffc);
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*ptr = val;
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}
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/* flush icache */
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asm volatile ("dcbst 0,%0" : : "r"(ptr) : "memory");
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asm volatile ("sync" : : : "memory");
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@ -24,9 +24,6 @@
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static uint8_t *tb_ret_addr;
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#define TCG_CT_PC14 0x100
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#define TCG_CT_PC24 0x200
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#define FAST_PATH
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#if TARGET_PHYS_ADDR_BITS <= 32
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#define ADDEND_OFFSET 0
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@ -140,7 +137,13 @@ static const int tcg_target_callee_save_regs[] = {
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static uint32_t reloc_pc24_val (void *pc, tcg_target_long target)
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{
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return (target - (tcg_target_long) pc) & 0x3fffffc;
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tcg_target_long disp;
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disp = target - (tcg_target_long) pc;
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if ((disp << 6) >> 6 != disp)
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tcg_abort ();
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return disp & 0x3fffffc;
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}
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static void reloc_pc24 (void *pc, tcg_target_long target)
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@ -151,7 +154,13 @@ static void reloc_pc24 (void *pc, tcg_target_long target)
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static uint16_t reloc_pc14_val (void *pc, tcg_target_long target)
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{
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return (target - (tcg_target_long) pc) & 0xfffc;
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tcg_target_long disp;
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disp = target - (tcg_target_long) pc;
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if (disp != (int16_t) disp)
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tcg_abort ();
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return disp & 0xfffc;
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}
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static void reloc_pc14 (void *pc, tcg_target_long target)
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@ -218,12 +227,6 @@ static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str)
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tcg_regset_reset_reg(ct->u.regs, TCG_REG_R6);
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tcg_regset_reset_reg(ct->u.regs, TCG_REG_R7);
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break;
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case 'J': /* 24 bit displacement */
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ct->ct |= TCG_CT_PC24;
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break;
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case 'j': /* 16 bit displacement */
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ct->ct |= TCG_CT_PC14;
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break;
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default:
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return -1;
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}
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@ -241,13 +244,6 @@ static int tcg_target_const_match(tcg_target_long val,
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ct = arg_ct->ct;
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if (ct & TCG_CT_CONST)
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return 1;
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else if (ct & TCG_CT_PC14) {
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return val == (int16_t) val;
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}
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else if (ct & TCG_CT_PC24) {
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if (val < 0) return val > -0x800000;
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return val < 0x7fffff;
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}
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return 0;
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}
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@ -407,6 +403,20 @@ static void tcg_out_ldst (TCGContext *s, int ret, int addr,
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}
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}
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static void tcg_out_b (TCGContext *s, int mask, tcg_target_long target)
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{
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tcg_target_long disp;
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disp = target - (tcg_target_long) s->code_ptr;
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if ((disp << 6) >> 6 == disp)
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tcg_out32 (s, B | disp | mask);
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else {
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tcg_out_movi (s, TCG_TYPE_I32, 0, (tcg_target_long) target);
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tcg_out32 (s, MTSPR | RS (0) | CTR);
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tcg_out32 (s, BCCTR | BO_ALWAYS | mask);
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}
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}
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#if defined(CONFIG_SOFTMMU)
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extern void __ldb_mmu(void);
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extern void __ldw_mmu(void);
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@ -507,8 +517,7 @@ static void tcg_out_qemu_ld (TCGContext *s, const TCGArg *args, int opc)
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tcg_out_movi (s, TCG_TYPE_I32, 5, mem_index);
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#endif
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tcg_out32 (s, B | reloc_pc24_val (s->code_ptr,
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(tcg_target_long) qemu_ld_helpers[s_bits]) | LK);
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tcg_out_b (s, LK, (tcg_target_long) qemu_ld_helpers[s_bits]);
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switch (opc) {
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case 0|4:
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tcg_out32 (s, EXTSB | RA (data_reg) | RS (3));
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@ -727,8 +736,7 @@ static void tcg_out_qemu_st (TCGContext *s, const TCGArg *args, int opc)
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ir++;
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tcg_out_movi (s, TCG_TYPE_I32, ir, mem_index);
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tcg_out32 (s, B | reloc_pc24_val (s->code_ptr,
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(tcg_target_long) qemu_st_helpers[opc]) | LK);
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tcg_out_b (s, LK, (tcg_target_long) qemu_st_helpers[opc]);
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label2_ptr = s->code_ptr;
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tcg_out32 (s, B);
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@ -932,6 +940,12 @@ static void tcg_out_brcond(TCGContext *s, int cond,
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}
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if (l->has_value) {
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tcg_target_long disp;
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disp = (tcg_target_long) s->code_ptr - l->u.value;
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if (disp != (int16_t) disp)
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tcg_abort ();
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tcg_out32 (s, tcg_to_bc[cond] | reloc_pc14_val (s->code_ptr,
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l->u.value));
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}
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@ -1010,14 +1024,31 @@ static void tcg_out_op(TCGContext *s, int opc, const TCGArg *args,
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switch (opc) {
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case INDEX_op_exit_tb:
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tcg_out_movi (s, TCG_TYPE_I32, TCG_REG_R3, args[0]);
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tcg_out32 (s, B | reloc_pc24_val (s->code_ptr, (tcg_target_long) tb_ret_addr));
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tcg_out_b (s, 0, (tcg_target_long) tb_ret_addr);
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break;
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case INDEX_op_goto_tb:
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if (s->tb_jmp_offset) {
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/* direct jump method */
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uint32_t val;
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uint16_t *p;
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s->tb_jmp_offset[args[0]] = s->code_ptr - s->code_buf;
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tcg_out32 (s, B | 4);
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} else {
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/* Thanks to Andrzej Zaborowski for this */
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val = *(uint32_t *) s->code_ptr & 0x3fffffc;
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tcg_out32 (s, B | val);
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/* For branches outside of LL range
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This must be in concord with tb_set_jmp_target1 */
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p = (uint16_t *) s->code_ptr;
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p[0] = (ADDIS | RT (0) | RA (0)) >> 16;
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p[2] = (ORI | RT (0) | RA (0)) >> 16;
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s->code_ptr += 8;
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tcg_out32 (s, MTSPR | RS (0) | CTR);
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tcg_out32 (s, BCCTR | BO_ALWAYS);
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}
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else {
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tcg_abort ();
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}
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s->tb_next_offset[args[0]] = s->code_ptr - s->code_buf;
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@ -1027,7 +1058,7 @@ static void tcg_out_op(TCGContext *s, int opc, const TCGArg *args,
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TCGLabel *l = &s->labels[args[0]];
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if (l->has_value) {
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tcg_out32 (s, B | reloc_pc24_val (s->code_ptr, l->u.value));
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tcg_out_b (s, 0, l->u.value);
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}
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else {
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tcg_out32 (s, B);
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@ -1037,7 +1068,7 @@ static void tcg_out_op(TCGContext *s, int opc, const TCGArg *args,
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break;
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case INDEX_op_call:
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if (const_args[0]) {
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tcg_out32 (s, B | reloc_pc24_val (s->code_ptr, args[0]) | LK);
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tcg_out_b (s, LK, args[0]);
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}
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else {
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tcg_out32 (s, MTSPR | RS (args[0]) | LR);
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@ -1046,7 +1077,7 @@ static void tcg_out_op(TCGContext *s, int opc, const TCGArg *args,
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break;
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case INDEX_op_jmp:
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if (const_args[0]) {
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tcg_out32 (s, B | reloc_pc24_val (s->code_ptr, args[0]));
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tcg_out_b (s, 0, args[0]);
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}
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else {
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tcg_out32 (s, MTSPR | RS (args[0]) | CTR);
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@ -1122,7 +1153,8 @@ static void tcg_out_op(TCGContext *s, int opc, const TCGArg *args,
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if (const_args[2]) {
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if (args[2]) {
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if (args[2] & 0xffff) {
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tcg_out32 (s, ORI | RS (args[1]) | RA (args[0]) | (args[2] & 0xffff));
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tcg_out32 (s, ORI | RS (args[1]) | RA (args[0])
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| (args[2] & 0xffff));
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if (args[2] >> 16)
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tcg_out32 (s, ORIS | RS (args[0]) | RA (args[0])
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| ((args[2] >> 16) & 0xffff));
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@ -1338,8 +1370,8 @@ static void tcg_out_op(TCGContext *s, int opc, const TCGArg *args,
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static const TCGTargetOpDef ppc_op_defs[] = {
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{ INDEX_op_exit_tb, { } },
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{ INDEX_op_goto_tb, { } },
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{ INDEX_op_call, { "rJ" } },
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{ INDEX_op_jmp, { "rJ" } },
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{ INDEX_op_call, { "ri" } },
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{ INDEX_op_jmp, { "ri" } },
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{ INDEX_op_br, { } },
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{ INDEX_op_mov_i32, { "r", "r" } },
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@ -410,4 +410,9 @@ uint64_t tcg_helper_divu_i64(uint64_t arg1, uint64_t arg2);
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uint64_t tcg_helper_remu_i64(uint64_t arg1, uint64_t arg2);
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extern uint8_t code_gen_prologue[];
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#ifdef __powerpc__
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#define tcg_qemu_tb_exec(tb_ptr) \
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((long REGPARM __attribute__ ((longcall)) (*)(void *))code_gen_prologue)(tb_ptr)
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#else
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#define tcg_qemu_tb_exec(tb_ptr) ((long REGPARM (*)(void *))code_gen_prologue)(tb_ptr)
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#endif
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