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esp: checkpatch fixes
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20210304221103.6369-2-mark.cave-ayland@ilande.co.uk>
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@ -241,8 +241,9 @@ static void handle_satn(ESPState *s)
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}
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s->pdma_cb = satn_pdma_cb;
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len = get_cmd(s, buf, sizeof(buf));
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if (len)
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if (len) {
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do_cmd(s, buf);
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}
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}
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static void s_without_satn_pdma_cb(ESPState *s)
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@ -398,8 +399,8 @@ static void esp_do_dma(ESPState *s)
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* handle_ti_cmd() with do_cmd != NULL (see the assert())
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*/
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trace_esp_do_dma(s->cmdlen, len);
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assert (s->cmdlen <= sizeof(s->cmdbuf) &&
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len <= sizeof(s->cmdbuf) - s->cmdlen);
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assert(s->cmdlen <= sizeof(s->cmdbuf) &&
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len <= sizeof(s->cmdbuf) - s->cmdlen);
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if (s->dma_memory_read) {
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s->dma_memory_read(s->dma_opaque, &s->cmdbuf[s->cmdlen], len);
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} else {
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@ -445,15 +446,18 @@ static void esp_do_dma(ESPState *s)
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s->dma_left -= len;
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s->async_buf += len;
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s->async_len -= len;
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if (to_device)
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if (to_device) {
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s->ti_size += len;
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else
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} else {
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s->ti_size -= len;
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}
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if (s->async_len == 0) {
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scsi_req_continue(s->current_req);
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/* If there is still data to be read from the device then
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complete the DMA operation immediately. Otherwise defer
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until the scsi layer has completed. */
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/*
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* If there is still data to be read from the device then
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* complete the DMA operation immediately. Otherwise defer
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* until the scsi layer has completed.
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*/
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if (to_device || s->dma_left != 0 || s->ti_size == 0) {
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return;
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}
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@ -490,7 +494,8 @@ void esp_command_complete(SCSIRequest *req, size_t resid)
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ESPState *s = req->hba_private;
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if (s->rregs[ESP_RSTAT] & STAT_INT) {
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/* Defer handling command complete until the previous
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/*
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* Defer handling command complete until the previous
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* interrupt has been handled.
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*/
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trace_esp_command_complete_deferred();
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@ -512,8 +517,10 @@ void esp_transfer_data(SCSIRequest *req, uint32_t len)
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if (s->dma_left) {
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esp_do_dma(s);
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} else if (s->dma_counter != 0 && s->ti_size <= 0) {
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/* If this was the last part of a DMA transfer then the
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completion interrupt is deferred to here. */
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/*
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* If this was the last part of a DMA transfer then the
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* completion interrupt is deferred to here.
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*/
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esp_dma_done(s);
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}
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}
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@ -530,17 +537,18 @@ static void handle_ti(ESPState *s)
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dmalen = s->rregs[ESP_TCLO];
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dmalen |= s->rregs[ESP_TCMID] << 8;
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dmalen |= s->rregs[ESP_TCHI] << 16;
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if (dmalen==0) {
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dmalen=0x10000;
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if (dmalen == 0) {
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dmalen = 0x10000;
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}
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s->dma_counter = dmalen;
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if (s->do_cmd)
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if (s->do_cmd) {
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minlen = (dmalen < ESP_CMDBUF_SZ) ? dmalen : ESP_CMDBUF_SZ;
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else if (s->ti_size < 0)
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} else if (s->ti_size < 0) {
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minlen = (dmalen < -s->ti_size) ? dmalen : -s->ti_size;
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else
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} else {
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minlen = (dmalen < s->ti_size) ? dmalen : s->ti_size;
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}
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trace_esp_handle_ti(minlen);
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if (s->dma) {
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s->dma_left = minlen;
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@ -605,8 +613,10 @@ uint64_t esp_reg_read(ESPState *s, uint32_t saddr)
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}
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break;
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case ESP_RINTR:
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/* Clear sequence step, interrupt register and all status bits
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except TC */
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/*
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* Clear sequence step, interrupt register and all status bits
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* except TC
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*/
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old_val = s->rregs[ESP_RINTR];
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s->rregs[ESP_RINTR] = 0;
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s->rregs[ESP_RSTAT] &= ~STAT_TC;
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@ -664,13 +674,13 @@ void esp_reg_write(ESPState *s, uint32_t saddr, uint64_t val)
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} else {
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s->dma = 0;
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}
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switch(val & CMD_CMD) {
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switch (val & CMD_CMD) {
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case CMD_NOP:
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trace_esp_mem_writeb_cmd_nop(val);
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break;
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case CMD_FLUSH:
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trace_esp_mem_writeb_cmd_flush(val);
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//s->ti_size = 0;
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/*s->ti_size = 0;*/
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s->rregs[ESP_RINTR] = INTR_FC;
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s->rregs[ESP_RSEQ] = 0;
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s->rregs[ESP_RFLAGS] = 0;
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@ -786,7 +796,7 @@ static const VMStateDescription vmstate_esp_pdma = {
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};
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const VMStateDescription vmstate_esp = {
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.name ="esp",
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.name = "esp",
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.version_id = 4,
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.minimum_version_id = 3,
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.fields = (VMStateField[]) {
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