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Free some more temporaries.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4729 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -840,21 +840,15 @@ static inline void gen_op_addr_add (void)
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See the MIPS64 PRA manual, section 4.10. */
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{
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int l1 = gen_new_label();
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TCGv r_tmp = tcg_temp_local_new(TCG_TYPE_I32);
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{
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TCGv r_tmp = tcg_temp_new(TCG_TYPE_I32);
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tcg_gen_ld_i32(r_tmp, cpu_env, offsetof(CPUState, hflags));
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tcg_gen_andi_i32(r_tmp, r_tmp, MIPS_HFLAG_KSU);
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tcg_gen_brcondi_i32(TCG_COND_NE, r_tmp, MIPS_HFLAG_UM, l1);
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}
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{
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TCGv r_tmp = tcg_temp_new(TCG_TYPE_I32);
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tcg_gen_ld_i32(r_tmp, cpu_env, offsetof(CPUState, CP0_Status));
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tcg_gen_andi_i32(r_tmp, r_tmp, (1 << CP0St_UX));
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tcg_gen_brcondi_i32(TCG_COND_NE, r_tmp, 0, l1);
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}
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tcg_gen_ld_i32(r_tmp, cpu_env, offsetof(CPUState, hflags));
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tcg_gen_andi_i32(r_tmp, r_tmp, MIPS_HFLAG_KSU);
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tcg_gen_brcondi_i32(TCG_COND_NE, r_tmp, MIPS_HFLAG_UM, l1);
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tcg_gen_ld_i32(r_tmp, cpu_env, offsetof(CPUState, CP0_Status));
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tcg_gen_andi_i32(r_tmp, r_tmp, (1 << CP0St_UX));
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tcg_gen_brcondi_i32(TCG_COND_NE, r_tmp, 0, l1);
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tcg_temp_free(r_tmp);
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tcg_gen_ext32s_i64(cpu_T[0], cpu_T[0]);
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gen_set_label(l1);
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}
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@ -5542,13 +5536,14 @@ static void gen_movci (DisasContext *ctx, int rd, int rs, int cc, int tf)
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gen_load_gpr(cpu_T[1], rs);
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{
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TCGv r_ptr = tcg_temp_new(TCG_TYPE_PTR);
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TCGv r_tmp = tcg_temp_new(TCG_TYPE_I32);
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TCGv r_tmp = tcg_temp_local_new(TCG_TYPE_I32);
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tcg_gen_ld_ptr(r_ptr, cpu_env, offsetof(CPUState, fpu));
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tcg_gen_ld_i32(r_tmp, r_ptr, offsetof(CPUMIPSFPUContext, fcr31));
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tcg_temp_free(r_ptr);
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tcg_gen_andi_i32(r_tmp, r_tmp, ccbit);
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tcg_gen_brcondi_i32(cond, r_tmp, 0, l1);
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tcg_temp_free(r_tmp);
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}
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tcg_gen_mov_tl(cpu_T[0], cpu_T[1]);
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