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hw/net/imx_fec: write TGSR and TCSR3 in imx_enet_write()

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The current code causes clang static code analyzer generate warning:
hw/net/imx_fec.c:858:9: warning: Value stored to 'value' is never read
        value = value & 0x0000000f;
        ^       ~~~~~~~~~~~~~~~~~~
hw/net/imx_fec.c:864:9: warning: Value stored to 'value' is never read
        value = value & 0x000000fd;
        ^       ~~~~~~~~~~~~~~~~~~

According to the definition of the function, the two “value” assignments
 should be written to registers.

Reported-by: Euler Robot <euler.robot@huawei.com>
Signed-off-by: Chen Qun <kuhn.chenqun@huawei.com>
Message-id: 20200313123242.13236-1-kuhn.chenqun@huawei.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Chen Qun 2020-03-13 20:32:42 +08:00 committed by Peter Maydell
parent 49cd55789b
commit a510d0c1cd
1 changed files with 4 additions and 2 deletions
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6
hw/net/imx_fec.c
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@ -855,13 +855,15 @@ static void imx_enet_write(IMXFECState *s, uint32_t index, uint32_t value)
break; break;
case ENET_TGSR: case ENET_TGSR:
/* implement clear timer flag */ /* implement clear timer flag */
value = value & 0x0000000f; s->regs[index] &= ~(value & 0x0000000f); /* all bits W1C */
break; break;
case ENET_TCSR0: case ENET_TCSR0:
case ENET_TCSR1: case ENET_TCSR1:
case ENET_TCSR2: case ENET_TCSR2:
case ENET_TCSR3: case ENET_TCSR3:
value = value & 0x000000fd; s->regs[index] &= ~(value & 0x00000080); /* W1C bits */
s->regs[index] &= ~0x0000007d; /* writable fields */
s->regs[index] |= (value & 0x0000007d);
break; break;
case ENET_TCCR0: case ENET_TCCR0:
case ENET_TCCR1: case ENET_TCCR1: