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target/mips: Support R5900 three-operand MADD1 and MADDU1 instructions

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The three-operand MADD and MADDU are specific to R5900 cores.

Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Fredrik Noring <noring@nocrew.org>
This commit is contained in:
Fredrik Noring 2018-12-27 20:29:14 +01:00 committed by Aleksandar Markovic
parent 3b948f053f
commit a95c4c26f1
1 changed files with 9 additions and 3 deletions
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12
target/mips/translate.c
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@ -5045,7 +5045,7 @@ static void gen_muldiv(DisasContext *ctx, uint32_t opc,
*
* and
*
* MADD[U] rd, rs, rt
* MADD[U][1] rd, rs, rt
*
* such that
*
@ -5107,6 +5107,9 @@ static void gen_mul_txx9(DisasContext *ctx, uint32_t opc,
tcg_temp_free_i32(t3);
}
break;
case MMI_OPC_MADD1:
acc = 1;
/* Fall through */
case MMI_OPC_MADD:
{
TCGv_i64 t2 = tcg_temp_new_i64();
@ -5126,6 +5129,9 @@ static void gen_mul_txx9(DisasContext *ctx, uint32_t opc,
tcg_temp_free_i64(t2);
}
break;
case MMI_OPC_MADDU1:
acc = 1;
/* Fall through */
case MMI_OPC_MADDU:
{
TCGv_i64 t2 = tcg_temp_new_i64();
@ -27370,6 +27376,8 @@ static void decode_mmi(CPUMIPSState *env, DisasContext *ctx)
case MMI_OPC_MULTU1:
case MMI_OPC_MADD:
case MMI_OPC_MADDU:
case MMI_OPC_MADD1:
case MMI_OPC_MADDU1:
gen_mul_txx9(ctx, opc, rd, rs, rt);
break;
case MMI_OPC_DIV1:
@ -27385,8 +27393,6 @@ static void decode_mmi(CPUMIPSState *env, DisasContext *ctx)
gen_HILO1_tx79(ctx, opc, rd);
break;
case MMI_OPC_PLZCW: /* TODO: MMI_OPC_PLZCW */
case MMI_OPC_MADD1: /* TODO: MMI_OPC_MADD1 */
case MMI_OPC_MADDU1: /* TODO: MMI_OPC_MADDU1 */
case MMI_OPC_PMFHL: /* TODO: MMI_OPC_PMFHL */
case MMI_OPC_PMTHL: /* TODO: MMI_OPC_PMTHL */
case MMI_OPC_PSLLH: /* TODO: MMI_OPC_PSLLH */