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ide: unify io_buffer_offset increments
IDEState's io_buffer_offset was originally added to keep track of offsets in AHCI rather exclusively, but it was added to IDEState instead of an AHCI-specific structure. AHCI fakes all PIO transfers using DMA and a scatter-gather list. When the core or atapi layers invoke HBA-specific mechanisms for transfers, they do not always know that it is being backed by DMA or a sglist, so this offset is not always updated by the HBA code everywhere. If we modify it in dma_buf_commit, however, any HBA that needs to use this offset to manage operating on only part of a sglist will have access to it. This will fix ATAPI PIO transfers performed through the AHCI HBA, which were previously not modifying this value appropriately. This will fix ATAPI PIO transfers larger than one sector. Reported-by: Hannes Reinecke <hare@suse.de> Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Tested-by: Laszlo Ersek <lersek@redhat.com> Message-id: 1440546331-29087-2-git-send-email-jsnow@redhat.com CC: qemu-stable@nongnu.org
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@ -49,7 +49,6 @@ static void ahci_reset_port(AHCIState *s, int port);
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static void ahci_write_fis_d2h(AHCIDevice *ad, uint8_t *cmd_fis);
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static void ahci_write_fis_d2h(AHCIDevice *ad, uint8_t *cmd_fis);
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static void ahci_init_d2h(AHCIDevice *ad);
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static void ahci_init_d2h(AHCIDevice *ad);
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static int ahci_dma_prepare_buf(IDEDMA *dma, int32_t limit);
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static int ahci_dma_prepare_buf(IDEDMA *dma, int32_t limit);
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static void ahci_commit_buf(IDEDMA *dma, uint32_t tx_bytes);
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static bool ahci_map_clb_address(AHCIDevice *ad);
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static bool ahci_map_clb_address(AHCIDevice *ad);
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static bool ahci_map_fis_address(AHCIDevice *ad);
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static bool ahci_map_fis_address(AHCIDevice *ad);
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static void ahci_unmap_clb_address(AHCIDevice *ad);
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static void ahci_unmap_clb_address(AHCIDevice *ad);
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@ -1289,7 +1288,7 @@ out:
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s->data_ptr = s->data_end;
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s->data_ptr = s->data_end;
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/* Update number of transferred bytes, destroy sglist */
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/* Update number of transferred bytes, destroy sglist */
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ahci_commit_buf(dma, size);
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dma_buf_commit(s, size);
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s->end_transfer_func(s);
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s->end_transfer_func(s);
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@ -1331,9 +1330,8 @@ static void ahci_restart(IDEDMA *dma)
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}
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}
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/**
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/**
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* Called in DMA R/W chains to read the PRDT, utilizing ahci_populate_sglist.
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* Called in DMA and PIO R/W chains to read the PRDT.
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* Not currently invoked by PIO R/W chains,
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* Not shared with NCQ pathways.
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* which invoke ahci_populate_sglist via ahci_start_transfer.
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*/
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*/
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static int32_t ahci_dma_prepare_buf(IDEDMA *dma, int32_t limit)
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static int32_t ahci_dma_prepare_buf(IDEDMA *dma, int32_t limit)
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{
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{
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@ -1352,21 +1350,16 @@ static int32_t ahci_dma_prepare_buf(IDEDMA *dma, int32_t limit)
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}
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}
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/**
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/**
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* Destroys the scatter-gather list,
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* Updates the command header with a bytes-read value.
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* and updates the command header with a bytes-read value.
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* Called via dma_buf_commit, for both DMA and PIO paths.
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* called explicitly via ahci_dma_rw_buf (ATAPI DMA),
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* sglist destruction is handled within dma_buf_commit.
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* and ahci_start_transfer (PIO R/W),
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* and called via callback from ide_dma_cb for DMA R/W paths.
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*/
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*/
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static void ahci_commit_buf(IDEDMA *dma, uint32_t tx_bytes)
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static void ahci_commit_buf(IDEDMA *dma, uint32_t tx_bytes)
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{
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{
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AHCIDevice *ad = DO_UPCAST(AHCIDevice, dma, dma);
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AHCIDevice *ad = DO_UPCAST(AHCIDevice, dma, dma);
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IDEState *s = &ad->port.ifs[0];
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tx_bytes += le32_to_cpu(ad->cur_cmd->status);
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tx_bytes += le32_to_cpu(ad->cur_cmd->status);
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ad->cur_cmd->status = cpu_to_le32(tx_bytes);
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ad->cur_cmd->status = cpu_to_le32(tx_bytes);
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qemu_sglist_destroy(&s->sg);
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}
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}
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static int ahci_dma_rw_buf(IDEDMA *dma, int is_write)
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static int ahci_dma_rw_buf(IDEDMA *dma, int is_write)
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@ -1387,10 +1380,9 @@ static int ahci_dma_rw_buf(IDEDMA *dma, int is_write)
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}
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}
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/* free sglist, update byte count */
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/* free sglist, update byte count */
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ahci_commit_buf(dma, l);
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dma_buf_commit(s, l);
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s->io_buffer_index += l;
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s->io_buffer_index += l;
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s->io_buffer_offset += l;
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DPRINTF(ad->port_no, "len=%#x\n", l);
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DPRINTF(ad->port_no, "len=%#x\n", l);
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@ -591,7 +591,6 @@ static void ide_sector_read_cb(void *opaque, int ret)
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s->nsector -= n;
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s->nsector -= n;
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/* Allow the guest to read the io_buffer */
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/* Allow the guest to read the io_buffer */
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ide_transfer_start(s, s->io_buffer, n * BDRV_SECTOR_SIZE, ide_sector_read);
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ide_transfer_start(s, s->io_buffer, n * BDRV_SECTOR_SIZE, ide_sector_read);
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s->io_buffer_offset += 512 * n;
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ide_set_irq(s->bus);
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ide_set_irq(s->bus);
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}
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}
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@ -635,11 +634,12 @@ static void ide_sector_read(IDEState *s)
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ide_sector_read_cb, s);
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ide_sector_read_cb, s);
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}
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}
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static void dma_buf_commit(IDEState *s, uint32_t tx_bytes)
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void dma_buf_commit(IDEState *s, uint32_t tx_bytes)
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{
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{
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if (s->bus->dma->ops->commit_buf) {
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if (s->bus->dma->ops->commit_buf) {
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s->bus->dma->ops->commit_buf(s->bus->dma, tx_bytes);
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s->bus->dma->ops->commit_buf(s->bus->dma, tx_bytes);
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}
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}
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s->io_buffer_offset += tx_bytes;
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qemu_sglist_destroy(&s->sg);
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qemu_sglist_destroy(&s->sg);
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}
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}
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@ -842,7 +842,6 @@ static void ide_sector_write_cb(void *opaque, int ret)
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n = s->req_nb_sectors;
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n = s->req_nb_sectors;
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}
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}
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s->nsector -= n;
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s->nsector -= n;
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s->io_buffer_offset += 512 * n;
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ide_set_sector(s, ide_get_sector(s) + n);
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ide_set_sector(s, ide_get_sector(s) + n);
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if (s->nsector == 0) {
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if (s->nsector == 0) {
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@ -536,6 +536,7 @@ int64_t ide_get_sector(IDEState *s);
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void ide_set_sector(IDEState *s, int64_t sector_num);
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void ide_set_sector(IDEState *s, int64_t sector_num);
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void ide_start_dma(IDEState *s, BlockCompletionFunc *cb);
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void ide_start_dma(IDEState *s, BlockCompletionFunc *cb);
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void dma_buf_commit(IDEState *s, uint32_t tx_bytes);
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void ide_dma_error(IDEState *s);
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void ide_dma_error(IDEState *s);
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void ide_atapi_cmd_ok(IDEState *s);
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void ide_atapi_cmd_ok(IDEState *s);
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