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bios: add support to memory above the pci hole
(Izik Eidus) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4237 c046a42c-6fe2-441c-8c8c-71466251a162
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BIN
pc-bios/bios.bin
BIN
pc-bios/bios.bin
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@ -1,10 +1,134 @@
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Index: rombios.c
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===================================================================
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RCS file: /cvsroot/bochs/bochs/bios/rombios.c,v
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retrieving revision 1.205
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diff -u -d -p -r1.205 rombios.c
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--- rombios.c 21 Mar 2008 19:06:31 -0000 1.205
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+++ rombios.c 10 Apr 2008 09:47:48 -0000
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@@ -4395,22 +4395,25 @@ BX_DEBUG_INT15("case default:\n");
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#endif // BX_USE_PS2_MOUSE
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-void set_e820_range(ES, DI, start, end, type)
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+void set_e820_range(ES, DI, start, end, extra_start, extra_end, type)
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Bit16u ES;
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Bit16u DI;
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Bit32u start;
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Bit32u end;
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+ Bit8u extra_start;
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+ Bit8u extra_end;
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Bit16u type;
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{
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write_word(ES, DI, start);
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write_word(ES, DI+2, start >> 16);
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- write_word(ES, DI+4, 0x00);
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+ write_word(ES, DI+4, extra_start);
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write_word(ES, DI+6, 0x00);
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end -= start;
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+ extra_end -= extra_start;
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write_word(ES, DI+8, end);
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write_word(ES, DI+10, end >> 16);
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- write_word(ES, DI+12, 0x0000);
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+ write_word(ES, DI+12, extra_end);
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write_word(ES, DI+14, 0x0000);
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write_word(ES, DI+16, type);
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@@ -4423,7 +4426,9 @@ int15_function32(regs, ES, DS, FLAGS)
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Bit16u ES, DS, FLAGS;
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{
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Bit32u extended_memory_size=0; // 64bits long
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+ Bit32u extra_lowbits_memory_size=0;
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Bit16u CX,DX;
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+ Bit8u extra_highbits_memory_size=0;
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BX_DEBUG_INT15("int15 AX=%04x\n",regs.u.r16.ax);
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@@ -4497,11 +4502,18 @@ ASM_END
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extended_memory_size += (1L * 1024 * 1024);
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}
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+ extra_lowbits_memory_size = inb_cmos(0x5c);
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+ extra_lowbits_memory_size <<= 8;
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+ extra_lowbits_memory_size |= inb_cmos(0x5b);
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+ extra_lowbits_memory_size *= 64;
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+ extra_lowbits_memory_size *= 1024;
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+ extra_highbits_memory_size = inb_cmos(0x5d);
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+
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switch(regs.u.r16.bx)
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{
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case 0:
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set_e820_range(ES, regs.u.r16.di,
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- 0x0000000L, 0x0009fc00L, 1);
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+ 0x0000000L, 0x0009fc00L, 0, 0, 1);
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regs.u.r32.ebx = 1;
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regs.u.r32.eax = 0x534D4150;
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regs.u.r32.ecx = 0x14;
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@@ -4510,7 +4522,7 @@ ASM_END
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break;
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case 1:
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set_e820_range(ES, regs.u.r16.di,
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- 0x0009fc00L, 0x000a0000L, 2);
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+ 0x0009fc00L, 0x000a0000L, 0, 0, 2);
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regs.u.r32.ebx = 2;
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regs.u.r32.eax = 0x534D4150;
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regs.u.r32.ecx = 0x14;
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@@ -4519,7 +4531,7 @@ ASM_END
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break;
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case 2:
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set_e820_range(ES, regs.u.r16.di,
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- 0x000e8000L, 0x00100000L, 2);
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+ 0x000e8000L, 0x00100000L, 0, 0, 2);
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regs.u.r32.ebx = 3;
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regs.u.r32.eax = 0x534D4150;
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regs.u.r32.ecx = 0x14;
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@@ -4529,7 +4541,7 @@ ASM_END
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case 3:
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set_e820_range(ES, regs.u.r16.di,
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0x00100000L,
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- extended_memory_size - ACPI_DATA_SIZE, 1);
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+ extended_memory_size - ACPI_DATA_SIZE ,0, 0, 1);
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regs.u.r32.ebx = 4;
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regs.u.r32.eax = 0x534D4150;
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regs.u.r32.ecx = 0x14;
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@@ -4539,7 +4551,7 @@ ASM_END
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case 4:
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set_e820_range(ES, regs.u.r16.di,
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extended_memory_size - ACPI_DATA_SIZE,
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- extended_memory_size, 3); // ACPI RAM
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+ extended_memory_size ,0, 0, 3); // ACPI RAM
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regs.u.r32.ebx = 5;
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regs.u.r32.eax = 0x534D4150;
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regs.u.r32.ecx = 0x14;
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@@ -4549,7 +4561,20 @@ ASM_END
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case 5:
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/* 256KB BIOS area at the end of 4 GB */
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set_e820_range(ES, regs.u.r16.di,
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- 0xfffc0000L, 0x00000000L, 2);
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+ 0xfffc0000L, 0x00000000L ,0, 0, 2);
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+ if (extra_highbits_memory_size || extra_lowbits_memory_size)
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+ regs.u.r32.ebx = 6;
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+ else
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+ regs.u.r32.ebx = 0;
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+ regs.u.r32.eax = 0x534D4150;
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+ regs.u.r32.ecx = 0x14;
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+ CLEAR_CF();
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+ return;
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+ case 6:
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+ /* Maping of memory above 4 GB */
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+ set_e820_range(ES, regs.u.r16.di, 0x00000000L,
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+ extra_lowbits_memory_size, 1, extra_highbits_memory_size
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+ + 1, 1);
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regs.u.r32.ebx = 0;
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regs.u.r32.eax = 0x534D4150;
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regs.u.r32.ecx = 0x14;
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Index: rombios.h
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===================================================================
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RCS file: /cvsroot/bochs/bochs/bios/rombios.h,v
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retrieving revision 1.6
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diff -u -d -p -r1.6 rombios.h
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--- rombios.h 26 Jan 2008 09:15:27 -0000 1.6
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+++ rombios.h 28 Mar 2008 10:22:04 -0000
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+++ rombios.h 10 Apr 2008 09:47:48 -0000
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@@ -19,7 +19,7 @@
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// Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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@ -20,7 +144,7 @@ RCS file: /cvsroot/bochs/bochs/bios/rombios32.c,v
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retrieving revision 1.24
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diff -u -d -p -r1.24 rombios32.c
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--- rombios32.c 6 Mar 2008 20:18:20 -0000 1.24
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+++ rombios32.c 28 Mar 2008 10:22:04 -0000
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+++ rombios32.c 10 Apr 2008 09:47:48 -0000
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@@ -477,7 +477,12 @@ void smp_probe(void)
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sipi_vector = AP_BOOT_ADDR >> 12;
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writel(APIC_BASE + APIC_ICR_LOW, 0x000C4600 | sipi_vector);
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@ -40,7 +164,7 @@ RCS file: /cvsroot/bochs/bochs/bios/rombios32start.S,v
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retrieving revision 1.4
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diff -u -d -p -r1.4 rombios32start.S
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--- rombios32start.S 26 Jan 2008 09:15:27 -0000 1.4
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+++ rombios32start.S 28 Mar 2008 10:22:04 -0000
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+++ rombios32start.S 10 Apr 2008 09:47:48 -0000
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@@ -42,7 +42,7 @@ _start:
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smp_ap_boot_code_start:
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xor %ax, %ax
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