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util: add stats64 module
This module provides fast paths for 64-bit atomic operations on machines that only have 32-bit atomic access. Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Fam Zheng <famz@redhat.com> Message-Id: <20170605123908.18777-11-pbonzini@redhat.com> Signed-off-by: Fam Zheng <famz@redhat.com>
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include/qemu/stats64.h
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193
include/qemu/stats64.h
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/*
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* Atomic operations on 64-bit quantities.
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*
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* Copyright (C) 2017 Red Hat, Inc.
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*
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* Author: Paolo Bonzini <pbonzini@redhat.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#ifndef QEMU_STATS64_H
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#define QEMU_STATS64_H 1
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#include "qemu/atomic.h"
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/* This provides atomic operations on 64-bit type, using a reader-writer
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* spinlock on architectures that do not have 64-bit accesses. Even on
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* those architectures, it tries hard not to take the lock.
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*/
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typedef struct Stat64 {
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#ifdef CONFIG_ATOMIC64
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uint64_t value;
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#else
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uint32_t low, high;
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uint32_t lock;
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#endif
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} Stat64;
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#ifdef CONFIG_ATOMIC64
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static inline void stat64_init(Stat64 *s, uint64_t value)
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{
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/* This is not guaranteed to be atomic! */
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*s = (Stat64) { value };
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}
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static inline uint64_t stat64_get(const Stat64 *s)
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{
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return atomic_read__nocheck(&s->value);
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}
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static inline void stat64_add(Stat64 *s, uint64_t value)
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{
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atomic_add(&s->value, value);
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}
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static inline void stat64_min(Stat64 *s, uint64_t value)
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{
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uint64_t orig = atomic_read__nocheck(&s->value);
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while (orig > value) {
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orig = atomic_cmpxchg__nocheck(&s->value, orig, value);
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}
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}
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static inline void stat64_max(Stat64 *s, uint64_t value)
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{
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uint64_t orig = atomic_read__nocheck(&s->value);
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while (orig < value) {
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orig = atomic_cmpxchg__nocheck(&s->value, orig, value);
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}
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}
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#else
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uint64_t stat64_get(const Stat64 *s);
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bool stat64_min_slow(Stat64 *s, uint64_t value);
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bool stat64_max_slow(Stat64 *s, uint64_t value);
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bool stat64_add32_carry(Stat64 *s, uint32_t low, uint32_t high);
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static inline void stat64_init(Stat64 *s, uint64_t value)
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{
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/* This is not guaranteed to be atomic! */
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*s = (Stat64) { .low = value, .high = value >> 32, .lock = 0 };
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}
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static inline void stat64_add(Stat64 *s, uint64_t value)
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{
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uint32_t low, high;
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high = value >> 32;
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low = (uint32_t) value;
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if (!low) {
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if (high) {
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atomic_add(&s->high, high);
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}
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return;
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}
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for (;;) {
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uint32_t orig = s->low;
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uint32_t result = orig + low;
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uint32_t old;
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if (result < low || high) {
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/* If the high part is affected, take the lock. */
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if (stat64_add32_carry(s, low, high)) {
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return;
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}
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continue;
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}
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/* No carry, try with a 32-bit cmpxchg. The result is independent of
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* the high 32 bits, so it can race just fine with stat64_add32_carry
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* and even stat64_get!
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*/
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old = atomic_cmpxchg(&s->low, orig, result);
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if (orig == old) {
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return;
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}
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}
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}
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static inline void stat64_min(Stat64 *s, uint64_t value)
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{
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uint32_t low, high;
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uint32_t orig_low, orig_high;
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high = value >> 32;
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low = (uint32_t) value;
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do {
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orig_high = atomic_read(&s->high);
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if (orig_high < high) {
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return;
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}
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if (orig_high == high) {
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/* High 32 bits are equal. Read low after high, otherwise we
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* can get a false positive (e.g. 0x1235,0x0000 changes to
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* 0x1234,0x8000 and we read it as 0x1234,0x0000). Pairs with
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* the write barrier in stat64_min_slow.
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*/
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smp_rmb();
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orig_low = atomic_read(&s->low);
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if (orig_low <= low) {
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return;
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}
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/* See if we were lucky and a writer raced against us. The
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* barrier is theoretically unnecessary, but if we remove it
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* we may miss being lucky.
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*/
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smp_rmb();
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orig_high = atomic_read(&s->high);
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if (orig_high < high) {
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return;
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}
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}
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/* If the value changes in any way, we have to take the lock. */
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} while (!stat64_min_slow(s, value));
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}
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static inline void stat64_max(Stat64 *s, uint64_t value)
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{
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uint32_t low, high;
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uint32_t orig_low, orig_high;
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high = value >> 32;
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low = (uint32_t) value;
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do {
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orig_high = atomic_read(&s->high);
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if (orig_high > high) {
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return;
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}
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if (orig_high == high) {
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/* High 32 bits are equal. Read low after high, otherwise we
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* can get a false positive (e.g. 0x1234,0x8000 changes to
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* 0x1235,0x0000 and we read it as 0x1235,0x8000). Pairs with
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* the write barrier in stat64_max_slow.
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*/
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smp_rmb();
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orig_low = atomic_read(&s->low);
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if (orig_low >= low) {
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return;
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}
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/* See if we were lucky and a writer raced against us. The
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* barrier is theoretically unnecessary, but if we remove it
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* we may miss being lucky.
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*/
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smp_rmb();
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orig_high = atomic_read(&s->high);
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if (orig_high > high) {
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return;
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}
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}
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/* If the value changes in any way, we have to take the lock. */
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} while (!stat64_max_slow(s, value));
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}
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#endif
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#endif
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@ -42,4 +42,5 @@ util-obj-y += log.o
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util-obj-y += qdist.o
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util-obj-y += qht.o
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util-obj-y += range.o
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util-obj-y += stats64.o
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util-obj-y += systemd.o
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137
util/stats64.c
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137
util/stats64.c
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/*
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* Atomic operations on 64-bit quantities.
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*
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* Copyright (C) 2017 Red Hat, Inc.
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*
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* Author: Paolo Bonzini <pbonzini@redhat.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#include "qemu/osdep.h"
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#include "qemu/atomic.h"
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#include "qemu/stats64.h"
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#include "qemu/processor.h"
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#ifndef CONFIG_ATOMIC64
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static inline void stat64_rdlock(Stat64 *s)
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{
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/* Keep out incoming writers to avoid them starving us. */
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atomic_add(&s->lock, 2);
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/* If there is a concurrent writer, wait for it. */
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while (atomic_read(&s->lock) & 1) {
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cpu_relax();
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}
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}
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static inline void stat64_rdunlock(Stat64 *s)
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{
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atomic_sub(&s->lock, 2);
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}
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static inline bool stat64_wrtrylock(Stat64 *s)
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{
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return atomic_cmpxchg(&s->lock, 0, 1) == 0;
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}
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static inline void stat64_wrunlock(Stat64 *s)
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{
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atomic_dec(&s->lock);
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}
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uint64_t stat64_get(const Stat64 *s)
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{
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uint32_t high, low;
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stat64_rdlock((Stat64 *)s);
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/* 64-bit writes always take the lock, so we can read in
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* any order.
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*/
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high = atomic_read(&s->high);
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low = atomic_read(&s->low);
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stat64_rdunlock((Stat64 *)s);
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return ((uint64_t)high << 32) | low;
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}
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bool stat64_add32_carry(Stat64 *s, uint32_t low, uint32_t high)
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{
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uint32_t old;
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if (!stat64_wrtrylock(s)) {
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cpu_relax();
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return false;
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}
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/* 64-bit reads always take the lock, so they don't care about the
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* order of our update. By updating s->low first, we can check
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* whether we have to carry into s->high.
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*/
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old = atomic_fetch_add(&s->low, low);
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high += (old + low) < old;
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atomic_add(&s->high, high);
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stat64_wrunlock(s);
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return true;
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}
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bool stat64_min_slow(Stat64 *s, uint64_t value)
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{
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uint32_t high, low;
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uint64_t orig;
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if (!stat64_wrtrylock(s)) {
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cpu_relax();
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return false;
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}
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high = atomic_read(&s->high);
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low = atomic_read(&s->low);
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orig = ((uint64_t)high << 32) | low;
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if (orig < value) {
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/* We have to set low before high, just like stat64_min reads
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* high before low. The value may become higher temporarily, but
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* stat64_get does not notice (it takes the lock) and the only ill
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* effect on stat64_min is that the slow path may be triggered
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* unnecessarily.
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*/
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atomic_set(&s->low, (uint32_t)value);
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smp_wmb();
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atomic_set(&s->high, value >> 32);
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}
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stat64_wrunlock(s);
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return true;
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}
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bool stat64_max_slow(Stat64 *s, uint64_t value)
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{
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uint32_t high, low;
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uint64_t orig;
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if (!stat64_wrtrylock(s)) {
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cpu_relax();
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return false;
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}
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high = atomic_read(&s->high);
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low = atomic_read(&s->low);
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orig = ((uint64_t)high << 32) | low;
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if (orig > value) {
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/* We have to set low before high, just like stat64_max reads
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* high before low. The value may become lower temporarily, but
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* stat64_get does not notice (it takes the lock) and the only ill
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* effect on stat64_max is that the slow path may be triggered
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* unnecessarily.
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*/
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atomic_set(&s->low, (uint32_t)value);
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smp_wmb();
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atomic_set(&s->high, value >> 32);
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}
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stat64_wrunlock(s);
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return true;
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}
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#endif
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