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q800: fix mac_via RTC PRAM commands
The command byte is not decoded correctly. This patch reworks the RTC/PRAM interface and fixes the problem. It adds a comment before the function to explain how are encoded commands and some trace-events to ease debugging. Bug: https://bugs.launchpad.net/qemu/+bug/1856549 Fixes: 6dca62a000 ("hw/m68k: add VIA support") Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20191219201439.84804-2-laurent@vivier.eu>
This commit is contained in:
Laurent Vivier
parent
cdbc5c51c8
commit
b2619c158a
@ -27,7 +27,7 @@
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#include "sysemu/runstate.h"
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#include "qapi/error.h"
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#include "qemu/cutils.h"
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#include "trace.h"
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/*
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* VIAs: There are two in every machine,
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@ -278,6 +278,21 @@
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/* VIA returns time offset from Jan 1, 1904, not 1970 */
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#define RTC_OFFSET 2082844800
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enum {
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REG_0,
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REG_1,
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REG_2,
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REG_3,
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REG_TEST,
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REG_WPROTECT,
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REG_PRAM_ADDR,
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REG_PRAM_ADDR_LAST = REG_PRAM_ADDR + 19,
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REG_PRAM_SECT,
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REG_PRAM_SECT_LAST = REG_PRAM_SECT + 7,
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REG_INVALID,
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REG_EMPTY = 0xff,
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};
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static void via1_VBL_update(MOS6522Q800VIA1State *v1s)
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{
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MOS6522State *s = MOS6522(v1s);
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@ -360,10 +375,62 @@ static void via2_irq_request(void *opaque, int irq, int level)
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mdc->update_irq(s);
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}
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/*
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* RTC Commands
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*
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* Command byte Register addressed by the command
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*
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* z0000001 Seconds register 0 (lowest-order byte)
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* z0000101 Seconds register 1
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* z0001001 Seconds register 2
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* z0001101 Seconds register 3 (highest-order byte)
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* 00110001 Test register (write-only)
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* 00110101 Write-Protect Register (write-only)
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* z010aa01 RAM address 100aa ($10-$13) (first 20 bytes only)
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* z1aaaa01 RAM address 0aaaa ($00-$0F) (first 20 bytes only)
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* z0111aaa Extended memory designator and sector number
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*
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* For a read request, z=1, for a write z=0
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* The letter a indicates bits whose value depend on what parameter
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* RAM byte you want to address
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*/
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static int via1_rtc_compact_cmd(uint8_t value)
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{
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uint8_t read = value & 0x80;
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value &= 0x7f;
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/* the last 2 bits of a command byte must always be 0b01 ... */
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if ((value & 0x78) == 0x38) {
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/* except for the extended memory designator */
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return read | (REG_PRAM_SECT + (value & 0x07));
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}
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if ((value & 0x03) == 0x01) {
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value >>= 2;
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if ((value & 0x1c) == 0) {
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/* seconds registers */
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return read | (REG_0 + (value & 0x03));
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} else if ((value == 0x0c) && !read) {
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return REG_TEST;
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} else if ((value == 0x0d) && !read) {
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return REG_WPROTECT;
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} else if ((value & 0x1c) == 0x08) {
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/* RAM address 0x10 to 0x13 */
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return read | (REG_PRAM_ADDR + 0x10 + (value & 0x03));
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} else if ((value & 0x43) == 0x41) {
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/* RAM address 0x00 to 0x0f */
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return read | (REG_PRAM_ADDR + (value & 0x0f));
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}
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}
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return REG_INVALID;
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}
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static void via1_rtc_update(MacVIAState *m)
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{
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MOS6522Q800VIA1State *v1s = &m->mos6522_via1;
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MOS6522State *s = MOS6522(v1s);
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int cmd, sector, addr;
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uint32_t time;
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if (s->b & VIA1B_vRTCEnb) {
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return;
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@ -376,7 +443,9 @@ static void via1_rtc_update(MacVIAState *m)
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m->data_out |= s->b & VIA1B_vRTCData;
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m->data_out_cnt++;
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}
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trace_via1_rtc_update_data_out(m->data_out_cnt, m->data_out);
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} else {
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trace_via1_rtc_update_data_in(m->data_in_cnt, m->data_in);
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/* receive bits from the RTC */
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if ((v1s->last_b & VIA1B_vRTCClk) &&
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!(s->b & VIA1B_vRTCClk) &&
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@ -386,96 +455,132 @@ static void via1_rtc_update(MacVIAState *m)
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m->data_in <<= 1;
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m->data_in_cnt--;
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}
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return;
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}
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if (m->data_out_cnt == 8) {
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m->data_out_cnt = 0;
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if (m->data_out_cnt != 8) {
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return;
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}
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if (m->cmd == 0) {
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if (m->data_out & 0x80) {
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/* this is a read command */
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uint32_t time = m->tick_offset +
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(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) /
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NANOSECONDS_PER_SECOND);
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if (m->data_out == 0x81) { /* seconds register 0 */
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m->data_in = time & 0xff;
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m->data_in_cnt = 8;
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} else if (m->data_out == 0x85) { /* seconds register 1 */
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m->data_in = (time >> 8) & 0xff;
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m->data_in_cnt = 8;
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} else if (m->data_out == 0x89) { /* seconds register 2 */
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m->data_in = (time >> 16) & 0xff;
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m->data_in_cnt = 8;
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} else if (m->data_out == 0x8d) { /* seconds register 3 */
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m->data_in = (time >> 24) & 0xff;
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m->data_in_cnt = 8;
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} else if ((m->data_out & 0xf3) == 0xa1) {
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/* PRAM address 0x10 -> 0x13 */
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int addr = (m->data_out >> 2) & 0x03;
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m->data_in = v1s->PRAM[addr];
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m->data_in_cnt = 8;
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} else if ((m->data_out & 0xf3) == 0xa1) {
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/* PRAM address 0x00 -> 0x0f */
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int addr = (m->data_out >> 2) & 0x0f;
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m->data_in = v1s->PRAM[addr];
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m->data_in_cnt = 8;
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} else if ((m->data_out & 0xf8) == 0xb8) {
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/* extended memory designator and sector number */
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m->cmd = m->data_out;
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}
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} else {
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/* this is a write command */
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m->cmd = m->data_out;
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}
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} else {
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if (m->cmd & 0x80) {
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if ((m->cmd & 0xf8) == 0xb8) {
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/* extended memory designator and sector number */
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int sector = m->cmd & 0x07;
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int addr = (m->data_out >> 2) & 0x1f;
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m->data_out_cnt = 0;
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m->data_in = v1s->PRAM[sector * 8 + addr];
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m->data_in_cnt = 8;
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}
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} else if (!m->wprotect) {
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/* this is a write command */
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if (m->alt != 0) {
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/* extended memory designator and sector number */
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int sector = m->cmd & 0x07;
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int addr = (m->alt >> 2) & 0x1f;
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trace_via1_rtc_internal_status(m->cmd, m->alt, m->data_out);
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/* first byte: it's a command */
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if (m->cmd == REG_EMPTY) {
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v1s->PRAM[sector * 8 + addr] = m->data_out;
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cmd = via1_rtc_compact_cmd(m->data_out);
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trace_via1_rtc_internal_cmd(cmd);
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m->alt = 0;
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} else if (m->cmd == 0x01) { /* seconds register 0 */
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/* FIXME */
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} else if (m->cmd == 0x05) { /* seconds register 1 */
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/* FIXME */
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} else if (m->cmd == 0x09) { /* seconds register 2 */
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/* FIXME */
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} else if (m->cmd == 0x0d) { /* seconds register 3 */
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/* FIXME */
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} else if (m->cmd == 0x31) {
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/* Test Register */
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} else if (m->cmd == 0x35) {
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/* Write Protect register */
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m->wprotect = m->data_out & 1;
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} else if ((m->cmd & 0xf3) == 0xa1) {
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/* PRAM address 0x10 -> 0x13 */
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int addr = (m->cmd >> 2) & 0x03;
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v1s->PRAM[addr] = m->data_out;
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} else if ((m->cmd & 0xf3) == 0xa1) {
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/* PRAM address 0x00 -> 0x0f */
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int addr = (m->cmd >> 2) & 0x0f;
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v1s->PRAM[addr] = m->data_out;
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} else if ((m->cmd & 0xf8) == 0xb8) {
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/* extended memory designator and sector number */
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m->alt = m->cmd;
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}
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}
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if (cmd == REG_INVALID) {
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trace_via1_rtc_cmd_invalid(m->data_out);
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return;
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}
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m->data_out = 0;
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if (cmd & 0x80) { /* this is a read command */
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switch (cmd & 0x7f) {
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case REG_0...REG_3: /* seconds registers */
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/*
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* register 0 is lowest-order byte
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* register 3 is highest-order byte
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*/
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time = m->tick_offset + (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)
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/ NANOSECONDS_PER_SECOND);
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trace_via1_rtc_internal_time(time);
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m->data_in = (time >> ((cmd & 0x03) << 3)) & 0xff;
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m->data_in_cnt = 8;
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trace_via1_rtc_cmd_seconds_read((cmd & 0x7f) - REG_0,
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m->data_in);
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break;
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case REG_PRAM_ADDR...REG_PRAM_ADDR_LAST:
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/* PRAM address 0x00 -> 0x13 */
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m->data_in = v1s->PRAM[(cmd & 0x7f) - REG_PRAM_ADDR];
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m->data_in_cnt = 8;
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trace_via1_rtc_cmd_pram_read((cmd & 0x7f) - REG_PRAM_ADDR,
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m->data_in);
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break;
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case REG_PRAM_SECT...REG_PRAM_SECT_LAST:
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/*
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* extended memory designator and sector number
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* the only two-byte read command
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*/
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trace_via1_rtc_internal_set_cmd(cmd);
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m->cmd = cmd;
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break;
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default:
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g_assert_not_reached();
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break;
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}
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return;
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}
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/* this is a write command, needs a parameter */
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if (cmd == REG_WPROTECT || !m->wprotect) {
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trace_via1_rtc_internal_set_cmd(cmd);
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m->cmd = cmd;
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} else {
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trace_via1_rtc_internal_ignore_cmd(cmd);
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}
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return;
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}
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/* second byte: it's a parameter */
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if (m->alt == REG_EMPTY) {
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switch (m->cmd & 0x7f) {
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case REG_0...REG_3: /* seconds register */
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/* FIXME */
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trace_via1_rtc_cmd_seconds_write(m->cmd - REG_0, m->data_out);
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m->cmd = REG_EMPTY;
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break;
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case REG_TEST:
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/* device control: nothing to do */
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trace_via1_rtc_cmd_test_write(m->data_out);
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m->cmd = REG_EMPTY;
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break;
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case REG_WPROTECT:
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/* Write Protect register */
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trace_via1_rtc_cmd_wprotect_write(m->data_out);
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m->wprotect = !!(m->data_out & 0x80);
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m->cmd = REG_EMPTY;
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break;
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case REG_PRAM_ADDR...REG_PRAM_ADDR_LAST:
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/* PRAM address 0x00 -> 0x13 */
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trace_via1_rtc_cmd_pram_write(m->cmd - REG_PRAM_ADDR, m->data_out);
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v1s->PRAM[m->cmd - REG_PRAM_ADDR] = m->data_out;
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m->cmd = REG_EMPTY;
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break;
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case REG_PRAM_SECT...REG_PRAM_SECT_LAST:
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addr = (m->data_out >> 2) & 0x1f;
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sector = (m->cmd & 0x7f) - REG_PRAM_SECT;
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if (m->cmd & 0x80) {
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/* it's a read */
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m->data_in = v1s->PRAM[sector * 32 + addr];
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m->data_in_cnt = 8;
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trace_via1_rtc_cmd_pram_sect_read(sector, addr,
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sector * 32 + addr,
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m->data_in);
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m->cmd = REG_EMPTY;
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} else {
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/* it's a write, we need one more parameter */
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trace_via1_rtc_internal_set_alt(addr, sector, addr);
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m->alt = addr;
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}
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break;
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default:
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g_assert_not_reached();
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break;
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}
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return;
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}
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/* third byte: it's the data of a REG_PRAM_SECT write */
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g_assert(REG_PRAM_SECT <= m->cmd && m->cmd <= REG_PRAM_SECT_LAST);
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sector = m->cmd - REG_PRAM_SECT;
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v1s->PRAM[sector * 32 + m->alt] = m->data_out;
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trace_via1_rtc_cmd_pram_sect_write(sector, m->alt, sector * 32 + m->alt,
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m->data_out);
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m->alt = REG_EMPTY;
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m->cmd = REG_EMPTY;
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}
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static int adb_via_poll(MacVIAState *s, int state, uint8_t *data)
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@ -742,6 +847,9 @@ static void mac_via_reset(DeviceState *dev)
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v1s->next_VBL = 0;
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timer_del(v1s->one_second_timer);
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v1s->next_second = 0;
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m->cmd = REG_EMPTY;
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m->alt = REG_EMPTY;
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}
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static void mac_via_realize(DeviceState *dev, Error **errp)
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@ -149,3 +149,22 @@ bcm2835_mbox_write(unsigned int size, uint64_t addr, uint64_t value) "mbox write
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bcm2835_mbox_read(unsigned int size, uint64_t addr, uint64_t value) "mbox read sz:%u addr:0x%"PRIx64" data:0x%"PRIx64
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bcm2835_mbox_irq(unsigned level) "mbox irq:ARM level:%u"
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bcm2835_mbox_property(uint32_t tag, uint32_t bufsize, size_t resplen) "mbox property tag:0x%08x in_sz:%u out_sz:%zu"
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# mac_via.c
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via1_rtc_update_data_out(int count, int value) "count=%d value=0x%02x"
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via1_rtc_update_data_in(int count, int value) "count=%d value=0x%02x"
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via1_rtc_internal_status(int cmd, int alt, int value) "cmd=0x%02x alt=0x%02x value=0x%02x"
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via1_rtc_internal_cmd(int cmd) "cmd=0x%02x"
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via1_rtc_cmd_invalid(int value) "value=0x%02x"
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via1_rtc_internal_time(uint32_t time) "time=0x%08x"
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via1_rtc_internal_set_cmd(int cmd) "cmd=0x%02x"
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via1_rtc_internal_ignore_cmd(int cmd) "cmd=0x%02x"
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via1_rtc_internal_set_alt(int alt, int sector, int offset) "alt=0x%02x sector=%u offset=%u"
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via1_rtc_cmd_seconds_read(int reg, int value) "reg=%d value=0x%02x"
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via1_rtc_cmd_seconds_write(int reg, int value) "reg=%d value=0x%02x"
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via1_rtc_cmd_test_write(int value) "value=0x%02x"
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via1_rtc_cmd_wprotect_write(int value) "value=0x%02x"
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via1_rtc_cmd_pram_read(int addr, int value) "addr=%u value=0x%02x"
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via1_rtc_cmd_pram_write(int addr, int value) "addr=%u value=0x%02x"
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via1_rtc_cmd_pram_sect_read(int sector, int offset, int addr, int value) "sector=%u offset=%u addr=%d value=0x%02x"
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via1_rtc_cmd_pram_sect_write(int sector, int offset, int addr, int value) "sector=%u offset=%u addr=%d value=0x%02x"
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