xemu-project/xemu
1
0
Fork 0
mirror of https://github.com/xemu-project/xemu.git synced 2025-02-03 10:43:28 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

piix_pci: adapt smram mapping to use memory mutators

Browse Source 
Eliminates fake state ->smram_enabled.

Signed-off-by: Avi Kivity <avi@redhat.com>
This commit is contained in:
Avi Kivity 2011-12-04 20:06:16 +02:00
parent 7969d9ed5c
commit b41e1ed4b3
1 changed files with 6 additions and 14 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

20
hw/piix_pci.c
View File

@ -81,7 +81,6 @@ struct PCII440FXState {
PAMMemoryRegion pam_regions[13];
MemoryRegion smram_region;
uint8_t smm_enabled;
bool smram_enabled;
PIIX3State *piix3;
};
@ -141,6 +140,7 @@ static void i440fx_update_memory_mappings(PCII440FXState *d)
{
int i, r;
uint32_t smram;
bool smram_enabled;
memory_region_transaction_begin();
update_pam(d, 0xf0000, 0x100000, (d->dev.config[I440FX_PAM] >> 4) & 3,
@ -151,18 +151,8 @@ static void i440fx_update_memory_mappings(PCII440FXState *d)
&d->pam_regions[i+1]);
}
smram = d->dev.config[I440FX_SMRAM];
if ((d->smm_enabled && (smram & 0x08)) || (smram & 0x40)) {
if (!d->smram_enabled) {
memory_region_del_subregion(d->system_memory, &d->smram_region);
d->smram_enabled = true;
}
} else {
if (d->smram_enabled) {
memory_region_add_subregion_overlap(d->system_memory, 0xa0000,
&d->smram_region, 1);
d->smram_enabled = false;
}
}
smram_enabled = (d->smm_enabled && (smram & 0x08)) || (smram & 0x40);
memory_region_set_enabled(&d->smram_region, !smram_enabled);
memory_region_transaction_commit();
}
@ -307,7 +297,9 @@ static PCIBus *i440fx_common_init(const char *device_name,
}
memory_region_init_alias(&f->smram_region, "smram-region",
f->pci_address_space, 0xa0000, 0x20000);
f->smram_enabled = true;
memory_region_add_subregion_overlap(f->system_memory, 0xa0000,
&f->smram_region, 1);
memory_region_set_enabled(&f->smram_region, false);
/* Xen supports additional interrupt routes from the PCI devices to
* the IOAPIC: the four pins of each PCI device on the bus are also