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target-sparc: implement UltraSPARC-T1 Strand status ASR
Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
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@ -3429,6 +3429,17 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn)
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case 0x19: /* System tick compare */
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gen_store_gpr(dc, rd, cpu_stick_cmpr);
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break;
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case 0x1a: /* UltraSPARC-T1 Strand status */
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/* XXX HYPV check maybe not enough, UA2005 & UA2007 describe
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* this ASR as impl. dep
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*/
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CHECK_IU_FEATURE(dc, HYPV);
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{
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TCGv t = gen_dest_gpr(dc, rd);
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tcg_gen_movi_tl(t, 1UL);
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gen_store_gpr(dc, rd, t);
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}
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break;
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case 0x10: /* Performance Control */
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case 0x11: /* Performance Instrumentation Counter */
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case 0x12: /* Dispatch Control */
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