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i8257: make the DMA running method per controller
This removes some static/global variables, and we're now running only the required controller (master or slave) Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Message-id: 1453843944-26833-7-git-send-email-hpoussin@reactos.org Signed-off-by: John Snow <jsnow@redhat.com>
This commit is contained in:
Hervé Poussineau
John Snow
parent
74c47de010
commit
b9ebd28c62
@ -62,6 +62,10 @@ typedef struct I8257State {
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I8257Regs regs[4];
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MemoryRegion channel_io;
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MemoryRegion cont_io;
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QEMUBH *dma_bh;
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bool dma_bh_scheduled;
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int running;
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} I8257State;
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static I8257State dma_controllers[2];
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@ -81,7 +85,7 @@ enum {
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};
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static void i8257_dma_run(void);
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static void i8257_dma_run(void *opaque);
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static int channels[8] = {-1, 2, 3, 1, -1, -1, -1, 0};
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@ -221,7 +225,7 @@ static void i8257_write_cont(void *opaque, hwaddr nport, uint64_t data,
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d->status &= ~(1 << (ichan + 4));
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}
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d->status &= ~(1 << ichan);
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i8257_dma_run();
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i8257_dma_run(d);
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break;
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case 0x02: /* single mask */
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@ -229,7 +233,7 @@ static void i8257_write_cont(void *opaque, hwaddr nport, uint64_t data,
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d->mask |= 1 << (data & 3);
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else
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d->mask &= ~(1 << (data & 3));
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i8257_dma_run();
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i8257_dma_run(d);
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break;
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case 0x03: /* mode */
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@ -264,12 +268,12 @@ static void i8257_write_cont(void *opaque, hwaddr nport, uint64_t data,
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case 0x06: /* clear mask for all channels */
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d->mask = 0;
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i8257_dma_run();
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i8257_dma_run(d);
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break;
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case 0x07: /* write mask for all channels */
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d->mask = data;
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i8257_dma_run();
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i8257_dma_run(d);
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break;
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default:
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@ -321,7 +325,7 @@ void DMA_hold_DREQ (int nchan)
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ichan = nchan & 3;
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linfo ("held cont=%d chan=%d\n", ncont, ichan);
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dma_controllers[ncont].status |= 1 << (ichan + 4);
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i8257_dma_run();
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i8257_dma_run(&dma_controllers[ncont]);
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}
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void DMA_release_DREQ (int nchan)
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@ -332,13 +336,14 @@ void DMA_release_DREQ (int nchan)
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ichan = nchan & 3;
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linfo ("released cont=%d chan=%d\n", ncont, ichan);
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dma_controllers[ncont].status &= ~(1 << (ichan + 4));
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i8257_dma_run();
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i8257_dma_run(&dma_controllers[ncont]);
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}
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static void i8257_channel_run(int ncont, int ichan)
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static void i8257_channel_run(I8257State *d, int ichan)
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{
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int ncont = d->dshift;
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int n;
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I8257Regs *r = &dma_controllers[ncont].regs[ichan];
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I8257Regs *r = &d->regs[ichan];
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#ifdef DEBUG_DMA
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int dir, opmode;
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@ -359,52 +364,38 @@ static void i8257_channel_run(int ncont, int ichan)
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ldebug ("dma_pos %d size %d\n", n, (r->base[COUNT] + 1) << ncont);
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}
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static QEMUBH *dma_bh;
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static bool dma_bh_scheduled;
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static void i8257_dma_run(void)
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static void i8257_dma_run(void *opaque)
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{
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I8257State *d;
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int icont, ichan;
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I8257State *d = opaque;
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int ichan;
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int rearm = 0;
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static int running = 0;
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if (running) {
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if (d->running) {
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rearm = 1;
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goto out;
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} else {
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running = 1;
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d->running = 1;
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}
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d = dma_controllers;
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for (icont = 0; icont < 2; icont++, d++) {
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for (ichan = 0; ichan < 4; ichan++) {
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int mask;
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mask = 1 << ichan;
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if ((0 == (d->mask & mask)) && (0 != (d->status & (mask << 4)))) {
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i8257_channel_run(icont, ichan);
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i8257_channel_run(d, ichan);
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rearm = 1;
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}
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}
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}
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running = 0;
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d->running = 0;
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out:
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if (rearm) {
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qemu_bh_schedule_idle(dma_bh);
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dma_bh_scheduled = true;
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qemu_bh_schedule_idle(d->dma_bh);
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d->dma_bh_scheduled = true;
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}
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}
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static void i8257_dma_run_bh(void *unused)
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{
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dma_bh_scheduled = false;
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i8257_dma_run();
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}
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void DMA_register_channel (int nchan,
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DMA_transfer_handler transfer_handler,
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void *opaque)
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@ -469,7 +460,8 @@ int DMA_write_memory (int nchan, void *buf, int pos, int len)
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*/
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void DMA_schedule(void)
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{
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if (dma_bh_scheduled) {
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if (dma_controllers[0].dma_bh_scheduled ||
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dma_controllers[1].dma_bh_scheduled) {
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qemu_notify_event();
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}
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}
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@ -552,6 +544,8 @@ static void dma_init2(I8257State *d, int base, int dshift,
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for (i = 0; i < ARRAY_SIZE (d->regs); ++i) {
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d->regs[i].transfer_handler = i8257_phony_handler;
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}
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d->dma_bh = qemu_bh_new(i8257_dma_run, d);
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}
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static const VMStateDescription vmstate_i8257_regs = {
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@ -572,7 +566,8 @@ static const VMStateDescription vmstate_i8257_regs = {
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static int i8257_post_load(void *opaque, int version_id)
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{
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i8257_dma_run();
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I8257State *d = opaque;
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i8257_dma_run(d);
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return 0;
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}
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@ -599,6 +594,4 @@ void DMA_init(ISABus *bus, int high_page_enable)
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dma_init2(&dma_controllers[1], 0xc0, 1, 0x88, high_page_enable ? 0x488 : -1);
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vmstate_register (NULL, 0, &vmstate_dma, &dma_controllers[0]);
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vmstate_register (NULL, 1, &vmstate_dma, &dma_controllers[1]);
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dma_bh = qemu_bh_new(i8257_dma_run_bh, NULL);
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}
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