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target/i386: Split out check_cpl0

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Split out the check for CPL != 0 and the raising of #GP.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20210514151342.384376-3-richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2021-05-14 10:12:54 -05:00
parent 6bd9958645
commit bc19f5052d
1 changed files with 30 additions and 49 deletions
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79
target/i386/tcg/translate.c
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@ -1282,6 +1282,16 @@ static void gen_exception_gpf(DisasContext *s)
gen_exception(s, EXCP0D_GPF, s->pc_start - s->cs_base); gen_exception(s, EXCP0D_GPF, s->pc_start - s->cs_base);
} }
/* Check for cpl == 0; if not, raise #GP and return false. */
static bool check_cpl0(DisasContext *s)
{
if (s->cpl == 0) {
return true;
}
gen_exception_gpf(s);
return false;
}
/* if d == OR_TMP0, it means memory operand (address in A0) */ /* if d == OR_TMP0, it means memory operand (address in A0) */
static void gen_op(DisasContext *s1, int op, MemOp ot, int d) static void gen_op(DisasContext *s1, int op, MemOp ot, int d)
{ {
@ -7199,9 +7209,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
break; break;
case 0x130: /* wrmsr */ case 0x130: /* wrmsr */
case 0x132: /* rdmsr */ case 0x132: /* rdmsr */
if (s->cpl != 0) { if (check_cpl0(s)) {
gen_exception_gpf(s);
} else {
gen_update_cc_op(s); gen_update_cc_op(s);
gen_jmp_im(s, pc_start - s->cs_base); gen_jmp_im(s, pc_start - s->cs_base);
if (b & 2) { if (b & 2) {
@ -7283,9 +7291,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
gen_helper_cpuid(cpu_env); gen_helper_cpuid(cpu_env);
break; break;
case 0xf4: /* hlt */ case 0xf4: /* hlt */
if (s->cpl != 0) { if (check_cpl0(s)) {
gen_exception_gpf(s);
} else {
gen_update_cc_op(s); gen_update_cc_op(s);
gen_jmp_im(s, pc_start - s->cs_base); gen_jmp_im(s, pc_start - s->cs_base);
gen_helper_hlt(cpu_env, tcg_const_i32(s->pc - pc_start)); gen_helper_hlt(cpu_env, tcg_const_i32(s->pc - pc_start));
@ -7309,9 +7315,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
case 2: /* lldt */ case 2: /* lldt */
if (!s->pe || s->vm86) if (!s->pe || s->vm86)
goto illegal_op; goto illegal_op;
if (s->cpl != 0) { if (check_cpl0(s)) {
gen_exception_gpf(s);
} else {
gen_svm_check_intercept(s, pc_start, SVM_EXIT_LDTR_WRITE); gen_svm_check_intercept(s, pc_start, SVM_EXIT_LDTR_WRITE);
gen_ldst_modrm(env, s, modrm, MO_16, OR_TMP0, 0); gen_ldst_modrm(env, s, modrm, MO_16, OR_TMP0, 0);
tcg_gen_trunc_tl_i32(s->tmp2_i32, s->T0); tcg_gen_trunc_tl_i32(s->tmp2_i32, s->T0);
@ -7330,9 +7334,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
case 3: /* ltr */ case 3: /* ltr */
if (!s->pe || s->vm86) if (!s->pe || s->vm86)
goto illegal_op; goto illegal_op;
if (s->cpl != 0) { if (check_cpl0(s)) {
gen_exception_gpf(s);
} else {
gen_svm_check_intercept(s, pc_start, SVM_EXIT_TR_WRITE); gen_svm_check_intercept(s, pc_start, SVM_EXIT_TR_WRITE);
gen_ldst_modrm(env, s, modrm, MO_16, OR_TMP0, 0); gen_ldst_modrm(env, s, modrm, MO_16, OR_TMP0, 0);
tcg_gen_trunc_tl_i32(s->tmp2_i32, s->T0); tcg_gen_trunc_tl_i32(s->tmp2_i32, s->T0);
@ -7446,8 +7448,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
| PREFIX_REPZ | PREFIX_REPNZ))) { | PREFIX_REPZ | PREFIX_REPNZ))) {
goto illegal_op; goto illegal_op;
} }
if (s->cpl != 0) { if (!check_cpl0(s)) {
gen_exception_gpf(s);
break; break;
} }
tcg_gen_concat_tl_i64(s->tmp1_i64, cpu_regs[R_EAX], tcg_gen_concat_tl_i64(s->tmp1_i64, cpu_regs[R_EAX],
@ -7463,8 +7464,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
if (!(s->flags & HF_SVME_MASK) || !s->pe) { if (!(s->flags & HF_SVME_MASK) || !s->pe) {
goto illegal_op; goto illegal_op;
} }
if (s->cpl != 0) { if (!check_cpl0(s)) {
gen_exception_gpf(s);
break; break;
} }
gen_update_cc_op(s); gen_update_cc_op(s);
@ -7488,8 +7488,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
if (!(s->flags & HF_SVME_MASK) || !s->pe) { if (!(s->flags & HF_SVME_MASK) || !s->pe) {
goto illegal_op; goto illegal_op;
} }
if (s->cpl != 0) { if (!check_cpl0(s)) {
gen_exception_gpf(s);
break; break;
} }
gen_update_cc_op(s); gen_update_cc_op(s);
@ -7501,8 +7500,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
if (!(s->flags & HF_SVME_MASK) || !s->pe) { if (!(s->flags & HF_SVME_MASK) || !s->pe) {
goto illegal_op; goto illegal_op;
} }
if (s->cpl != 0) { if (!check_cpl0(s)) {
gen_exception_gpf(s);
break; break;
} }
gen_update_cc_op(s); gen_update_cc_op(s);
@ -7516,8 +7514,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
|| !s->pe) { || !s->pe) {
goto illegal_op; goto illegal_op;
} }
if (s->cpl != 0) { if (!check_cpl0(s)) {
gen_exception_gpf(s);
break; break;
} }
gen_update_cc_op(s); gen_update_cc_op(s);
@ -7530,8 +7527,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
if (!(s->flags & HF_SVME_MASK) || !s->pe) { if (!(s->flags & HF_SVME_MASK) || !s->pe) {
goto illegal_op; goto illegal_op;
} }
if (s->cpl != 0) { if (!check_cpl0(s)) {
gen_exception_gpf(s);
break; break;
} }
gen_update_cc_op(s); gen_update_cc_op(s);
@ -7554,8 +7550,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
if (!(s->flags & HF_SVME_MASK) || !s->pe) { if (!(s->flags & HF_SVME_MASK) || !s->pe) {
goto illegal_op; goto illegal_op;
} }
if (s->cpl != 0) { if (!check_cpl0(s)) {
gen_exception_gpf(s);
break; break;
} }
gen_update_cc_op(s); gen_update_cc_op(s);
@ -7564,8 +7559,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
break; break;
CASE_MODRM_MEM_OP(2): /* lgdt */ CASE_MODRM_MEM_OP(2): /* lgdt */
if (s->cpl != 0) { if (!check_cpl0(s)) {
gen_exception_gpf(s);
break; break;
} }
gen_svm_check_intercept(s, pc_start, SVM_EXIT_GDTR_WRITE); gen_svm_check_intercept(s, pc_start, SVM_EXIT_GDTR_WRITE);
@ -7581,8 +7575,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
break; break;
CASE_MODRM_MEM_OP(3): /* lidt */ CASE_MODRM_MEM_OP(3): /* lidt */
if (s->cpl != 0) { if (!check_cpl0(s)) {
gen_exception_gpf(s);
break; break;
} }
gen_svm_check_intercept(s, pc_start, SVM_EXIT_IDTR_WRITE); gen_svm_check_intercept(s, pc_start, SVM_EXIT_IDTR_WRITE);
@ -7627,8 +7620,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
gen_helper_wrpkru(cpu_env, s->tmp2_i32, s->tmp1_i64); gen_helper_wrpkru(cpu_env, s->tmp2_i32, s->tmp1_i64);
break; break;
CASE_MODRM_OP(6): /* lmsw */ CASE_MODRM_OP(6): /* lmsw */
if (s->cpl != 0) { if (!check_cpl0(s)) {
gen_exception_gpf(s);
break; break;
} }
gen_svm_check_intercept(s, pc_start, SVM_EXIT_WRITE_CR0); gen_svm_check_intercept(s, pc_start, SVM_EXIT_WRITE_CR0);
@ -7639,8 +7631,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
break; break;
CASE_MODRM_MEM_OP(7): /* invlpg */ CASE_MODRM_MEM_OP(7): /* invlpg */
if (s->cpl != 0) { if (!check_cpl0(s)) {
gen_exception_gpf(s);
break; break;
} }
gen_update_cc_op(s); gen_update_cc_op(s);
@ -7654,9 +7645,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
case 0xf8: /* swapgs */ case 0xf8: /* swapgs */
#ifdef TARGET_X86_64 #ifdef TARGET_X86_64
if (CODE64(s)) { if (CODE64(s)) {
if (s->cpl != 0) { if (check_cpl0(s)) {
gen_exception_gpf(s);
} else {
tcg_gen_mov_tl(s->T0, cpu_seg_base[R_GS]); tcg_gen_mov_tl(s->T0, cpu_seg_base[R_GS]);
tcg_gen_ld_tl(cpu_seg_base[R_GS], cpu_env, tcg_gen_ld_tl(cpu_seg_base[R_GS], cpu_env,
offsetof(CPUX86State, kernelgsbase)); offsetof(CPUX86State, kernelgsbase));
@ -7690,9 +7679,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
case 0x108: /* invd */ case 0x108: /* invd */
case 0x109: /* wbinvd */ case 0x109: /* wbinvd */
if (s->cpl != 0) { if (check_cpl0(s)) {
gen_exception_gpf(s);
} else {
gen_svm_check_intercept(s, pc_start, (b & 2) ? SVM_EXIT_INVD : SVM_EXIT_WBINVD); gen_svm_check_intercept(s, pc_start, (b & 2) ? SVM_EXIT_INVD : SVM_EXIT_WBINVD);
/* nothing to do */ /* nothing to do */
} }
@ -8014,9 +8001,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
break; break;
case 0x120: /* mov reg, crN */ case 0x120: /* mov reg, crN */
case 0x122: /* mov crN, reg */ case 0x122: /* mov crN, reg */
if (s->cpl != 0) { if (check_cpl0(s)) {
gen_exception_gpf(s);
} else {
modrm = x86_ldub_code(env, s); modrm = x86_ldub_code(env, s);
/* Ignore the mod bits (assume (modrm&0xc0)==0xc0). /* Ignore the mod bits (assume (modrm&0xc0)==0xc0).
* AMD documentation (24594.pdf) and testing of * AMD documentation (24594.pdf) and testing of
@ -8068,9 +8053,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
break; break;
case 0x121: /* mov reg, drN */ case 0x121: /* mov reg, drN */
case 0x123: /* mov drN, reg */ case 0x123: /* mov drN, reg */
if (s->cpl != 0) { if (check_cpl0(s)) {
gen_exception_gpf(s);
} else {
#ifndef CONFIG_USER_ONLY #ifndef CONFIG_USER_ONLY
modrm = x86_ldub_code(env, s); modrm = x86_ldub_code(env, s);
/* Ignore the mod bits (assume (modrm&0xc0)==0xc0). /* Ignore the mod bits (assume (modrm&0xc0)==0xc0).
@ -8104,9 +8087,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
} }
break; break;
case 0x106: /* clts */ case 0x106: /* clts */
if (s->cpl != 0) { if (check_cpl0(s)) {
gen_exception_gpf(s);
} else {
gen_svm_check_intercept(s, pc_start, SVM_EXIT_WRITE_CR0); gen_svm_check_intercept(s, pc_start, SVM_EXIT_WRITE_CR0);
gen_helper_clts(cpu_env); gen_helper_clts(cpu_env);
/* abort block because static cpu state changed */ /* abort block because static cpu state changed */