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More TCGv type fixes.

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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4553 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
pbrook 2008-05-24 02:24:25 +00:00
parent cb63669a54
commit bcb0126ff4
2 changed files with 11 additions and 3 deletions
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3
target-sparc/translate.c
View File

@ -4401,7 +4401,8 @@ static void disas_sparc_insn(DisasContext * dc)
/* V9 stqf, store quad fpreg */
CHECK_FPU_FEATURE(dc, FLOAT128);
gen_op_load_fpr_QT0(QFPREG(rd));
tcg_gen_helper_0_2(helper_stqf, cpu_addr, dc->mem_idx);
tcg_gen_helper_0_2(helper_stqf, cpu_addr,
tcg_const_i32(dc->mem_idx));
break;
#else /* !TARGET_SPARC64 */
/* stdfq, store floating point queue */

11
tcg/tcg-op.h
View File

@ -56,6 +56,13 @@ static inline void tcg_gen_op2i(int opc, TCGv arg1, TCGArg arg2)
*gen_opparam_ptr++ = arg2;
}
static inline void tcg_gen_op2ii(int opc, TCGArg arg1, TCGArg arg2)
{
*gen_opc_ptr++ = opc;
*gen_opparam_ptr++ = arg1;
*gen_opparam_ptr++ = arg2;
}
static inline void tcg_gen_op3(int opc, TCGv arg1, TCGv arg2, TCGv arg3)
{
*gen_opc_ptr++ = opc;
@ -1406,8 +1413,8 @@ static inline void tcg_gen_debug_insn_start(uint64_t pc)
{
/* XXX: must really use a 32 bit size for TCGArg in all cases */
#if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
tcg_gen_op2i(INDEX_op_debug_insn_start,
(uint32_t)(pc), (uint32_t)(pc >> 32));
tcg_gen_op2ii(INDEX_op_debug_insn_start,
(uint32_t)(pc), (uint32_t)(pc >> 32));
#else
tcg_gen_op1i(INDEX_op_debug_insn_start, pc);
#endif