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ppc: Convert nip moves to TCG

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Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5160 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
aurel32 2008-09-04 18:06:03 +00:00
parent d38ff48941
commit bd568f1849
2 changed files with 12 additions and 38 deletions
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30
target-ppc/op.c
View File

@ -46,20 +46,6 @@ void OPPROTO op_raise_exception_err (void)
do_raise_exception_err(PARAM1, PARAM2);
}
void OPPROTO op_update_nip (void)
{
env->nip = (uint32_t)PARAM1;
RETURN();
}
#if defined(TARGET_PPC64)
void OPPROTO op_update_nip_64 (void)
{
env->nip = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2;
RETURN();
}
#endif
void OPPROTO op_debug (void)
{
do_raise_exception(EXCP_DEBUG);
@ -465,8 +451,6 @@ void OPPROTO op_store_fpscr (void)
}
/* Branch */
#define EIP env->nip
void OPPROTO op_setlr (void)
{
env->lr = (uint32_t)PARAM1;
@ -481,20 +465,6 @@ void OPPROTO op_setlr_64 (void)
}
#endif
void OPPROTO op_b_T1 (void)
{
env->nip = (uint32_t)(T1 & ~3);
RETURN();
}
#if defined (TARGET_PPC64)
void OPPROTO op_b_T1_64 (void)
{
env->nip = (uint64_t)(T1 & ~3);
RETURN();
}
#endif
void OPPROTO op_jz_T0 (void)
{
if (!T0)

20
target-ppc/translate.c
View File

@ -60,6 +60,7 @@ static TCGv cpu_gprh[32];
static TCGv cpu_fpr[32];
static TCGv cpu_avrh[32], cpu_avrl[32];
static TCGv cpu_crf[8];
static TCGv cpu_nip;
/* dyngen register indexes */
static TCGv cpu_T[3];
@ -164,6 +165,9 @@ void ppc_translate_init(void)
p += (i < 10) ? 6 : 7;
}
cpu_nip = tcg_global_mem_new(TCG_TYPE_TL, TCG_AREG0,
offsetof(CPUState, nip), "nip");
/* register helpers */
#undef DEF_HELPER
#define DEF_HELPER(ret, name, params) tcg_register_helper(name, #name);
@ -268,10 +272,10 @@ static always_inline void gen_update_nip (DisasContext *ctx, target_ulong nip)
{
#if defined(TARGET_PPC64)
if (ctx->sf_mode)
gen_op_update_nip_64(nip >> 32, nip);
tcg_gen_movi_tl(cpu_nip, nip);
else
#endif
gen_op_update_nip(nip);
tcg_gen_movi_tl(cpu_nip, (uint32_t)nip);
}
#define GEN_EXCP(ctx, excp, error) \
@ -2836,19 +2840,19 @@ static always_inline void gen_goto_tb (DisasContext *ctx, int n,
tcg_gen_movi_tl(cpu_T[1], dest);
#if defined(TARGET_PPC64)
if (ctx->sf_mode)
gen_op_b_T1_64();
tcg_gen_andi_tl(cpu_nip, cpu_T[1], ~3);
else
#endif
gen_op_b_T1();
tcg_gen_andi_tl(cpu_nip, cpu_T[1], (uint32_t)~3);
tcg_gen_exit_tb((long)tb + n);
} else {
tcg_gen_movi_tl(cpu_T[1], dest);
#if defined(TARGET_PPC64)
if (ctx->sf_mode)
gen_op_b_T1_64();
tcg_gen_andi_tl(cpu_nip, cpu_T[1], ~3);
else
#endif
gen_op_b_T1();
tcg_gen_andi_tl(cpu_nip, cpu_T[1], (uint32_t)~3);
if (unlikely(ctx->singlestep_enabled)) {
if ((ctx->singlestep_enabled &
(CPU_BRANCH_STEP | CPU_SINGLE_STEP)) &&
@ -2969,10 +2973,10 @@ static always_inline void gen_bcond (DisasContext *ctx, int type)
} else {
#if defined(TARGET_PPC64)
if (ctx->sf_mode)
gen_op_b_T1_64();
tcg_gen_andi_tl(cpu_nip, cpu_T[1], ~3);
else
#endif
gen_op_b_T1();
tcg_gen_andi_tl(cpu_nip, cpu_T[1], (uint32_t)~3);
goto no_test;
}
break;