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mipssim: do not use isa_mmio
Untested, this board does not support PCI so it cannot run endianness-test. It should fix endianness bugs in I/O port access. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-11-git-send-email-pbonzini@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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@ -140,6 +140,7 @@ mips_mipssim_init(QEMUMachineInitArgs *args)
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const char *initrd_filename = args->initrd_filename;
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const char *initrd_filename = args->initrd_filename;
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char *filename;
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char *filename;
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MemoryRegion *address_space_mem = get_system_memory();
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MemoryRegion *address_space_mem = get_system_memory();
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MemoryRegion *isa = g_new(MemoryRegion, 1);
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MemoryRegion *ram = g_new(MemoryRegion, 1);
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MemoryRegion *ram = g_new(MemoryRegion, 1);
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MemoryRegion *bios = g_new(MemoryRegion, 1);
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MemoryRegion *bios = g_new(MemoryRegion, 1);
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MIPSCPU *cpu;
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MIPSCPU *cpu;
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@ -212,7 +213,9 @@ mips_mipssim_init(QEMUMachineInitArgs *args)
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cpu_mips_clock_init(env);
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cpu_mips_clock_init(env);
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/* Register 64 KB of ISA IO space at 0x1fd00000. */
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/* Register 64 KB of ISA IO space at 0x1fd00000. */
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isa_mmio_init(0x1fd00000, 0x00010000);
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memory_region_init_alias(isa, NULL, "isa_mmio",
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get_system_io(), 0, 0x00010000);
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memory_region_add_subregion(get_system_memory(), 0x1fd00000, isa);
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/* A single 16450 sits at offset 0x3f8. It is attached to
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/* A single 16450 sits at offset 0x3f8. It is attached to
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MIPS CPU INT2, which is interrupt 4. */
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MIPS CPU INT2, which is interrupt 4. */
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