mirror of
https://github.com/xemu-project/xemu.git
synced 2025-01-19 18:35:15 +00:00
target-arm: ignore ELR_ELx[1] for exception return to 32-bit ARM mode
The architecture requires that for an exception return to AArch32 the low bits of ELR_ELx are ignored when the PC is set from them: * if returning to Thumb mode, ignore ELR_ELx[0] * if returning to ARM mode, ignore ELR_ELx[1:0] We were only squashing bit 0; also squash bit 1 if the SPSR T bit indicates this is a return to ARM code. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
This commit is contained in:
parent
e393f339af
commit
c1e0371442
@ -738,7 +738,11 @@ void HELPER(exception_return)(CPUARMState *env)
|
|||||||
}
|
}
|
||||||
aarch64_sync_64_to_32(env);
|
aarch64_sync_64_to_32(env);
|
||||||
|
|
||||||
env->regs[15] = env->elr_el[cur_el] & ~0x1;
|
if (spsr & CPSR_T) {
|
||||||
|
env->regs[15] = env->elr_el[cur_el] & ~0x1;
|
||||||
|
} else {
|
||||||
|
env->regs[15] = env->elr_el[cur_el] & ~0x3;
|
||||||
|
}
|
||||||
} else {
|
} else {
|
||||||
env->aarch64 = 1;
|
env->aarch64 = 1;
|
||||||
pstate_write(env, spsr);
|
pstate_write(env, spsr);
|
||||||
|
Loading…
x
Reference in New Issue
Block a user