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hw/i386/xen/xen-hvm: Inline xen_piix_pci_write_config_client() and remove it

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xen_piix_pci_write_config_client() is implemented in the xen sub tree and
uses PIIX constants internally, thus creating a direct dependency on
PIIX. Now that xen_set_pci_link_route() is stubbable, the logic of
xen_piix_pci_write_config_client() can be moved to PIIX which resolves
the dependency.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Paul Durrant <paul@xen.org>
Message-Id: <20220626094656.15673-3-shentey@gmail.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
This commit is contained in:
Bernhard Beschow 2022-06-26 11:46:56 +02:00 committed by Laurent Vivier
parent 21d87050af
commit c379bd7551
4 changed files with 14 additions and 24 deletions
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18
hw/i386/xen/xen-hvm.c
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@ -15,7 +15,6 @@
#include "hw/pci/pci.h" #include "hw/pci/pci.h"
#include "hw/pci/pci_host.h" #include "hw/pci/pci_host.h"
#include "hw/i386/pc.h" #include "hw/i386/pc.h"
#include "hw/southbridge/piix.h"
#include "hw/irq.h" #include "hw/irq.h"
#include "hw/hw.h" #include "hw/hw.h"
#include "hw/i386/apic-msidef.h" #include "hw/i386/apic-msidef.h"
@ -149,23 +148,6 @@ void xen_piix3_set_irq(void *opaque, int irq_num, int level)
irq_num & 3, level); irq_num & 3, level);
} }
void xen_piix_pci_write_config_client(uint32_t address, uint32_t val, int len)
{
int i;
/* Scan for updates to PCI link routes (0x60-0x63). */
for (i = 0; i < len; i++) {
uint8_t v = (val >> (8 * i)) & 0xff;
if (v & 0x80) {
v = 0;
}
v &= 0xf;
if (((address + i) >= PIIX_PIRQCA) && ((address + i) <= PIIX_PIRQCD)) {
xen_set_pci_link_route(address + i - PIIX_PIRQCA, v);
}
}
}
int xen_set_pci_link_route(uint8_t link, uint8_t irq) int xen_set_pci_link_route(uint8_t link, uint8_t irq)
{ {
return xendevicemodel_set_pci_link_route(xen_dmod, xen_domid, link, irq); return xendevicemodel_set_pci_link_route(xen_dmod, xen_domid, link, irq);

15
hw/isa/piix3.c
View File

@ -138,7 +138,20 @@ static void piix3_write_config(PCIDevice *dev,
static void piix3_write_config_xen(PCIDevice *dev, static void piix3_write_config_xen(PCIDevice *dev,
uint32_t address, uint32_t val, int len) uint32_t address, uint32_t val, int len)
{ {
xen_piix_pci_write_config_client(address, val, len); int i;
/* Scan for updates to PCI link routes (0x60-0x63). */
for (i = 0; i < len; i++) {
uint8_t v = (val >> (8 * i)) & 0xff;
if (v & 0x80) {
v = 0;
}
v &= 0xf;
if (((address + i) >= PIIX_PIRQCA) && ((address + i) <= PIIX_PIRQCD)) {
xen_set_pci_link_route(address + i - PIIX_PIRQCA, v);
}
}
piix3_write_config(dev, address, val, len); piix3_write_config(dev, address, val, len);
} }

1
include/hw/xen/xen.h
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@ -23,7 +23,6 @@ extern bool xen_domid_restrict;
int xen_pci_slot_get_pirq(PCIDevice *pci_dev, int irq_num); int xen_pci_slot_get_pirq(PCIDevice *pci_dev, int irq_num);
int xen_set_pci_link_route(uint8_t link, uint8_t irq); int xen_set_pci_link_route(uint8_t link, uint8_t irq);
void xen_piix3_set_irq(void *opaque, int irq_num, int level); void xen_piix3_set_irq(void *opaque, int irq_num, int level);
void xen_piix_pci_write_config_client(uint32_t address, uint32_t val, int len);
void xen_hvm_inject_msi(uint64_t addr, uint32_t data); void xen_hvm_inject_msi(uint64_t addr, uint32_t data);
int xen_is_pirq_msi(uint32_t msi_data); int xen_is_pirq_msi(uint32_t msi_data);

4
stubs/xen-hw-stub.c
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@ -19,10 +19,6 @@ void xen_piix3_set_irq(void *opaque, int irq_num, int level)
{ {
} }
void xen_piix_pci_write_config_client(uint32_t address, uint32_t val, int len)
{
}
int xen_set_pci_link_route(uint8_t link, uint8_t irq) int xen_set_pci_link_route(uint8_t link, uint8_t irq)
{ {
return -1; return -1;