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tcg-s390: Use qemu_getauxval in query_facilities
No need to set up a SIGILL signal handler for detection anymore. Remove a ton of sanity checks that must be true, given that we're requiring a 64-bit build (the note about 31-bit KVM is satisfied by configuring with TCI). Signed-off-by: Richard Henderson <rth@twiddle.net>
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@ -479,6 +479,20 @@ typedef struct {
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#define HWCAP_SPARC_V9 16
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#define HWCAP_SPARC_ULTRA3 32
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/* Bits present in AT_HWCAP for s390. */
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#define HWCAP_S390_ESAN3 1
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#define HWCAP_S390_ZARCH 2
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#define HWCAP_S390_STFLE 4
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#define HWCAP_S390_MSA 8
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#define HWCAP_S390_LDISP 16
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#define HWCAP_S390_EIMM 32
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#define HWCAP_S390_DFP 64
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#define HWCAP_S390_HPAGE 128
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#define HWCAP_S390_ETF3EH 256
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#define HWCAP_S390_HIGH_GPRS 512
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#define HWCAP_S390_TE 1024
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/*
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* 68k ELF relocation types
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*/
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@ -31,6 +31,8 @@
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#error "unsupported code generation mode"
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#endif
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#include "elf.h"
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/* ??? The translation blocks produced by TCG are generally small enough to
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be entirely reachable with a 16-bit displacement. Leaving the option for
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a 32-bit displacement here Just In Case. */
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@ -2233,91 +2235,18 @@ static void sigill_handler(int sig)
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static void query_facilities(void)
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{
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struct sigaction sa_old, sa_new;
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register int r0 __asm__("0");
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register void *r1 __asm__("1");
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int fail;
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unsigned long hwcap = qemu_getauxval(AT_HWCAP);
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memset(&sa_new, 0, sizeof(sa_new));
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sa_new.sa_handler = sigill_handler;
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sigaction(SIGILL, &sa_new, &sa_old);
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/* Is STORE FACILITY LIST EXTENDED available? Honestly, I believe this
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is present on all 64-bit systems, but let's check for it anyway. */
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if (hwcap & HWCAP_S390_STFLE) {
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register int r0 __asm__("0");
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register void *r1 __asm__("1");
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/* First, try STORE FACILITY LIST EXTENDED. If this is present, then
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we need not do any more probing. Unfortunately, this itself is an
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extension and the original STORE FACILITY LIST instruction is
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kernel-only, storing its results at absolute address 200. */
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/* stfle 0(%r1) */
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r1 = &facilities;
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asm volatile(".word 0xb2b0,0x1000"
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: "=r"(r0) : "0"(0), "r"(r1) : "memory", "cc");
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if (got_sigill) {
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/* STORE FACILITY EXTENDED is not available. Probe for one of each
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kind of instruction that we're interested in. */
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/* ??? Possibly some of these are in practice never present unless
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the store-facility-extended facility is also present. But since
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that isn't documented it's just better to probe for each. */
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/* Test for z/Architecture. Required even in 31-bit mode. */
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got_sigill = 0;
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/* agr %r0,%r0 */
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asm volatile(".word 0xb908,0x0000" : "=r"(r0) : : "cc");
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if (!got_sigill) {
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facilities |= FACILITY_ZARCH_ACTIVE;
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}
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/* Test for long displacement. */
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got_sigill = 0;
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/* ly %r0,0(%r1) */
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/* stfle 0(%r1) */
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r1 = &facilities;
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asm volatile(".word 0xe300,0x1000,0x0058"
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: "=r"(r0) : "r"(r1) : "cc");
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if (!got_sigill) {
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facilities |= FACILITY_LONG_DISP;
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}
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/* Test for extended immediates. */
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got_sigill = 0;
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/* afi %r0,0 */
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asm volatile(".word 0xc209,0x0000,0x0000" : : : "cc");
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if (!got_sigill) {
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facilities |= FACILITY_EXT_IMM;
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}
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/* Test for general-instructions-extension. */
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got_sigill = 0;
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/* msfi %r0,1 */
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asm volatile(".word 0xc201,0x0000,0x0001");
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if (!got_sigill) {
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facilities |= FACILITY_GEN_INST_EXT;
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}
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}
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sigaction(SIGILL, &sa_old, NULL);
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/* The translator currently uses these extensions unconditionally.
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Pruning this back to the base ESA/390 architecture doesn't seem
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worthwhile, since even the KVM target requires z/Arch. */
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fail = 0;
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if ((facilities & FACILITY_ZARCH_ACTIVE) == 0) {
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fprintf(stderr, "TCG: z/Arch facility is required.\n");
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fprintf(stderr, "TCG: Boot with a 64-bit enabled kernel.\n");
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fail = 1;
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}
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if ((facilities & FACILITY_LONG_DISP) == 0) {
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fprintf(stderr, "TCG: long-displacement facility is required.\n");
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fail = 1;
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}
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/* So far there's just enough support for 31-bit mode to let the
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compile succeed. This is good enough to run QEMU with KVM. */
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if (sizeof(void *) != 8) {
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fprintf(stderr, "TCG: 31-bit mode is not supported.\n");
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fail = 1;
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}
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if (fail) {
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exit(-1);
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asm volatile(".word 0xb2b0,0x1000"
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: "=r"(r0) : "0"(0), "r"(r1) : "memory", "cc");
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}
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}
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