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target/moxie: Convert to CPUClass::tlb_fill

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Remove the user-only functions, as we don't have a user-only config.
Fix the unconditional call to tlb_set_page, even if the translation
failed.

Cc: Anthony Green <green@moxielogic.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2019-04-02 16:30:06 +07:00
parent 931d019f5b
commit ccfd61fc6b
3 changed files with 19 additions and 52 deletions
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5
target/moxie/cpu.c
View File

@ -112,9 +112,8 @@ static void moxie_cpu_class_init(ObjectClass *oc, void *data)
cc->do_interrupt = moxie_cpu_do_interrupt;
cc->dump_state = moxie_cpu_dump_state;
cc->set_pc = moxie_cpu_set_pc;
#ifdef CONFIG_USER_ONLY
cc->handle_mmu_fault = moxie_cpu_handle_mmu_fault;
#else
cc->tlb_fill = moxie_cpu_tlb_fill;
#ifndef CONFIG_USER_ONLY
cc->get_phys_page_debug = moxie_cpu_get_phys_page_debug;
cc->vmsd = &vmstate_moxie_cpu;
#endif

5
target/moxie/cpu.h
View File

@ -139,7 +139,8 @@ static inline void cpu_get_tb_cpu_state(CPUMoxieState *env, target_ulong *pc,
*flags = 0;
}
int moxie_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int size,
int rw, int mmu_idx);
bool moxie_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
MMUAccessType access_type, int mmu_idx,
bool probe, uintptr_t retaddr);
#endif /* MOXIE_CPU_H */

61
target/moxie/helper.c
View File

@ -26,18 +26,10 @@
#include "qemu/host-utils.h"
#include "exec/helper-proto.h"
/* Try to fill the TLB and return an exception if error. If retaddr is
NULL, it means that the function was called in C code (i.e. not
from generated code or from helper.c) */
void tlb_fill(CPUState *cs, target_ulong addr, int size,
MMUAccessType access_type, int mmu_idx, uintptr_t retaddr)
{
int ret;
ret = moxie_cpu_handle_mmu_fault(cs, addr, size, access_type, mmu_idx);
if (unlikely(ret)) {
cpu_loop_exit_restore(cs, retaddr);
}
moxie_cpu_tlb_fill(cs, addr, size, access_type, mmu_idx, false, retaddr);
}
void helper_raise_exception(CPUMoxieState *env, int ex)
@ -85,53 +77,29 @@ void helper_debug(CPUMoxieState *env)
cpu_loop_exit(cs);
}
#if defined(CONFIG_USER_ONLY)
void moxie_cpu_do_interrupt(CPUState *cs)
{
CPUState *cs = CPU(moxie_env_get_cpu(env));
cs->exception_index = -1;
}
int moxie_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size,
int rw, int mmu_idx)
{
MoxieCPU *cpu = MOXIE_CPU(cs);
cs->exception_index = 0xaa;
cpu->env.debug1 = address;
cpu_dump_state(cs, stderr, 0);
return 1;
}
#else /* !CONFIG_USER_ONLY */
int moxie_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size,
int rw, int mmu_idx)
bool moxie_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
MMUAccessType access_type, int mmu_idx,
bool probe, uintptr_t retaddr)
{
MoxieCPU *cpu = MOXIE_CPU(cs);
CPUMoxieState *env = &cpu->env;
MoxieMMUResult res;
int prot, miss;
target_ulong phy;
int r = 1;
address &= TARGET_PAGE_MASK;
prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
miss = moxie_mmu_translate(&res, env, address, rw, mmu_idx);
if (miss) {
/* handle the miss. */
phy = 0;
cs->exception_index = MOXIE_EX_MMU_MISS;
} else {
phy = res.phy;
r = 0;
miss = moxie_mmu_translate(&res, env, address, access_type, mmu_idx);
if (likely(!miss)) {
tlb_set_page(cs, address, res.phy, prot, mmu_idx, TARGET_PAGE_SIZE);
return true;
}
if (probe) {
return false;
}
tlb_set_page(cs, address, phy, prot, mmu_idx, TARGET_PAGE_SIZE);
return r;
}
cs->exception_index = MOXIE_EX_MMU_MISS;
cpu_loop_exit_restore(cs, retaddr);
}
void moxie_cpu_do_interrupt(CPUState *cs)
{
@ -156,4 +124,3 @@ hwaddr moxie_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
}
return phy;
}
#endif