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i386: define the 'ssbd' CPUID feature bit (CVE-2018-3639)
New microcode introduces the "Speculative Store Bypass Disable" CPUID feature bit. This needs to be exposed to guest OS to allow them to protect against CVE-2018-3639. Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Message-Id: <20180521215424.13520-2-berrange@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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@ -805,7 +805,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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NULL, NULL, "spec-ctrl", NULL,
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NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, "ssbd",
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},
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.cpuid_eax = 7,
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.cpuid_needs_ecx = true, .cpuid_ecx = 0,
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@ -685,6 +685,7 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS];
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#define CPUID_7_0_EDX_AVX512_4VNNIW (1U << 2) /* AVX512 Neural Network Instructions */
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#define CPUID_7_0_EDX_AVX512_4FMAPS (1U << 3) /* AVX512 Multiply Accumulation Single Precision */
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#define CPUID_7_0_EDX_SPEC_CTRL (1U << 26) /* Speculation Control */
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#define CPUID_7_0_EDX_SPEC_CTRL_SSBD (1U << 31) /* Speculative Store Bypass Disable */
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#define KVM_HINTS_DEDICATED (1U << 0)
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