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target-i386: do not compute eflags multiple times consecutively
After calling gen_compute_eflags, leave the computed value in cc_reg_src and set cc_op to CC_OP_EFLAGS. The next few patches will remove anyway most calls to gen_compute_eflags. As a result of this change it is more natural to remove the register argument from gen_compute_eflags and change all the callers. Reviewed-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
This commit is contained in:
Richard Henderson
parent
1608ecca95
commit
d229edce1c
@ -845,47 +845,48 @@ static void gen_compute_eflags_c(DisasContext *s, TCGv reg)
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tcg_gen_extu_i32_tl(reg, cpu_tmp2_i32);
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}
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/* compute all eflags to reg */
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static void gen_compute_eflags(DisasContext *s, TCGv reg)
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/* compute all eflags to cc_src */
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static void gen_compute_eflags(DisasContext *s)
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{
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if (s->cc_op == CC_OP_EFLAGS) {
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return;
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}
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gen_update_cc_op(s);
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gen_helper_cc_compute_all(cpu_tmp2_i32, cpu_env, cpu_cc_op);
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if (TCGV_EQUAL(reg, cpu_cc_src)) {
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tcg_gen_discard_tl(cpu_cc_dst);
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set_cc_op(s, CC_OP_EFLAGS);
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}
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tcg_gen_extu_i32_tl(reg, cpu_tmp2_i32);
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tcg_gen_discard_tl(cpu_cc_dst);
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set_cc_op(s, CC_OP_EFLAGS);
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tcg_gen_extu_i32_tl(cpu_cc_src, cpu_tmp2_i32);
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}
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/* compute eflags.P to reg */
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static void gen_compute_eflags_p(DisasContext *s, TCGv reg)
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{
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gen_compute_eflags(s, reg);
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tcg_gen_shri_tl(reg, reg, 2);
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gen_compute_eflags(s);
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tcg_gen_shri_tl(reg, cpu_cc_src, 2);
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tcg_gen_andi_tl(reg, reg, 1);
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}
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/* compute eflags.S to reg */
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static void gen_compute_eflags_s(DisasContext *s, TCGv reg)
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{
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gen_compute_eflags(s, reg);
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tcg_gen_shri_tl(reg, reg, 7);
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gen_compute_eflags(s);
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tcg_gen_shri_tl(reg, cpu_cc_src, 7);
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tcg_gen_andi_tl(reg, reg, 1);
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}
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/* compute eflags.O to reg */
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static void gen_compute_eflags_o(DisasContext *s, TCGv reg)
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{
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gen_compute_eflags(s, reg);
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tcg_gen_shri_tl(reg, reg, 11);
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gen_compute_eflags(s);
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tcg_gen_shri_tl(reg, cpu_cc_src, 11);
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tcg_gen_andi_tl(reg, reg, 1);
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}
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/* compute eflags.Z to reg */
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static void gen_compute_eflags_z(DisasContext *s, TCGv reg)
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{
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gen_compute_eflags(s, reg);
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tcg_gen_shri_tl(reg, reg, 6);
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gen_compute_eflags(s);
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tcg_gen_shri_tl(reg, cpu_cc_src, 6);
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tcg_gen_andi_tl(reg, reg, 1);
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}
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@ -902,9 +903,9 @@ static inline void gen_setcc_slow_T0(DisasContext *s, int jcc_op)
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gen_compute_eflags_z(s, cpu_T[0]);
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break;
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case JCC_BE:
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gen_compute_eflags(s, cpu_tmp0);
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tcg_gen_shri_tl(cpu_T[0], cpu_tmp0, 6);
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tcg_gen_or_tl(cpu_T[0], cpu_T[0], cpu_tmp0);
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gen_compute_eflags(s);
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tcg_gen_shri_tl(cpu_T[0], cpu_cc_src, 6);
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tcg_gen_or_tl(cpu_T[0], cpu_T[0], cpu_cc_src);
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tcg_gen_andi_tl(cpu_T[0], cpu_T[0], 1);
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break;
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case JCC_S:
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@ -914,18 +915,18 @@ static inline void gen_setcc_slow_T0(DisasContext *s, int jcc_op)
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gen_compute_eflags_p(s, cpu_T[0]);
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break;
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case JCC_L:
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gen_compute_eflags(s, cpu_tmp0);
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tcg_gen_shri_tl(cpu_T[0], cpu_tmp0, 11); /* CC_O */
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tcg_gen_shri_tl(cpu_tmp0, cpu_tmp0, 7); /* CC_S */
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gen_compute_eflags(s);
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tcg_gen_shri_tl(cpu_T[0], cpu_cc_src, 11); /* CC_O */
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tcg_gen_shri_tl(cpu_tmp0, cpu_cc_src, 7); /* CC_S */
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tcg_gen_xor_tl(cpu_T[0], cpu_T[0], cpu_tmp0);
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tcg_gen_andi_tl(cpu_T[0], cpu_T[0], 1);
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break;
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default:
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case JCC_LE:
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gen_compute_eflags(s, cpu_tmp0);
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tcg_gen_shri_tl(cpu_T[0], cpu_tmp0, 11); /* CC_O */
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tcg_gen_shri_tl(cpu_tmp4, cpu_tmp0, 7); /* CC_S */
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tcg_gen_shri_tl(cpu_tmp0, cpu_tmp0, 6); /* CC_Z */
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gen_compute_eflags(s);
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tcg_gen_shri_tl(cpu_T[0], cpu_cc_src, 11); /* CC_O */
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tcg_gen_shri_tl(cpu_tmp4, cpu_cc_src, 7); /* CC_S */
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tcg_gen_shri_tl(cpu_tmp0, cpu_cc_src, 6); /* CC_Z */
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tcg_gen_xor_tl(cpu_T[0], cpu_T[0], cpu_tmp4);
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tcg_gen_or_tl(cpu_T[0], cpu_T[0], cpu_tmp0);
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tcg_gen_andi_tl(cpu_T[0], cpu_T[0], 1);
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@ -1619,7 +1620,7 @@ static void gen_rot_rm_T1(DisasContext *s, int ot, int op1,
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}
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/* update eflags. It is needed anyway most of the time, do it always. */
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gen_compute_eflags(s, cpu_cc_src);
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gen_compute_eflags(s);
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assert(s->cc_op == CC_OP_EFLAGS);
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label2 = gen_new_label();
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@ -1696,7 +1697,7 @@ static void gen_rot_rm_im(DisasContext *s, int ot, int op1, int op2,
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if (op2 != 0) {
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/* update eflags */
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gen_compute_eflags(s, cpu_cc_src);
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gen_compute_eflags(s);
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assert(s->cc_op == CC_OP_EFLAGS);
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tcg_gen_andi_tl(cpu_cc_src, cpu_cc_src, ~(CC_O | CC_C));
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@ -1720,8 +1721,7 @@ static void gen_rot_rm_im(DisasContext *s, int ot, int op1, int op2,
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static void gen_rotc_rm_T1(DisasContext *s, int ot, int op1,
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int is_right)
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{
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gen_update_cc_op(s);
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gen_compute_eflags(s, cpu_cc_src);
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gen_compute_eflags(s);
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assert(s->cc_op == CC_OP_EFLAGS);
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/* load */
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@ -6483,7 +6483,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
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if (CODE64(s) && !(s->cpuid_ext3_features & CPUID_EXT3_LAHF_LM))
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goto illegal_op;
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gen_op_mov_TN_reg(OT_BYTE, 0, R_AH);
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gen_compute_eflags(s, cpu_cc_src);
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gen_compute_eflags(s);
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tcg_gen_andi_tl(cpu_cc_src, cpu_cc_src, CC_O);
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tcg_gen_andi_tl(cpu_T[0], cpu_T[0], CC_S | CC_Z | CC_A | CC_P | CC_C);
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tcg_gen_or_tl(cpu_cc_src, cpu_cc_src, cpu_T[0]);
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@ -6491,21 +6491,21 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
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case 0x9f: /* lahf */
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if (CODE64(s) && !(s->cpuid_ext3_features & CPUID_EXT3_LAHF_LM))
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goto illegal_op;
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gen_compute_eflags(s, cpu_T[0]);
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gen_compute_eflags(s);
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/* Note: gen_compute_eflags() only gives the condition codes */
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tcg_gen_ori_tl(cpu_T[0], cpu_T[0], 0x02);
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tcg_gen_ori_tl(cpu_T[0], cpu_cc_src, 0x02);
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gen_op_mov_reg_T0(OT_BYTE, R_AH);
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break;
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case 0xf5: /* cmc */
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gen_compute_eflags(s, cpu_cc_src);
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gen_compute_eflags(s);
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tcg_gen_xori_tl(cpu_cc_src, cpu_cc_src, CC_C);
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break;
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case 0xf8: /* clc */
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gen_compute_eflags(s, cpu_cc_src);
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gen_compute_eflags(s);
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tcg_gen_andi_tl(cpu_cc_src, cpu_cc_src, ~CC_C);
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break;
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case 0xf9: /* stc */
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gen_compute_eflags(s, cpu_cc_src);
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gen_compute_eflags(s);
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tcg_gen_ori_tl(cpu_cc_src, cpu_cc_src, CC_C);
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break;
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case 0xfc: /* cld */
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@ -7381,7 +7381,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
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} else {
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gen_op_mov_reg_v(ot, rm, t0);
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}
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gen_compute_eflags(s, cpu_cc_src);
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gen_compute_eflags(s);
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tcg_gen_andi_tl(cpu_cc_src, cpu_cc_src, ~CC_Z);
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tcg_gen_or_tl(cpu_cc_src, cpu_cc_src, t2);
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tcg_temp_free(t0);
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