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target/mips: Make the results of DIV_<U|S>.<B|H|W|D> the same as on hardware
MSA instructions DIV_<U|S>.<B|H|W|D> when dividing by zero, didn't return the same value when executed on a referent hardware (FPGA MIPS 64 r6, little endian) and when executed on QEMU, which is not a real bug, because the result when dividing by zero is UNPREDICTABLE [1] (page 141, 142). [1] MIPS Architecture for Programmers Volume IV-j: The MIPS64 SIMD Architecture Module, Revision 1.12 Signed-off-by: Mateja Marjanovic <mateja.marjanovic@rt-rk.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Message-Id: <1554207110-9113-2-git-send-email-mateja.marjanovic@rt-rk.com>
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@ -641,14 +641,15 @@ static inline int64_t msa_div_s_df(uint32_t df, int64_t arg1, int64_t arg2)
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if (arg1 == DF_MIN_INT(df) && arg2 == -1) {
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return DF_MIN_INT(df);
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}
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return arg2 ? arg1 / arg2 : 0;
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return arg2 ? arg1 / arg2
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: arg1 >= 0 ? -1 : 1;
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}
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static inline int64_t msa_div_u_df(uint32_t df, int64_t arg1, int64_t arg2)
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{
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uint64_t u_arg1 = UNSIGNED(arg1, df);
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uint64_t u_arg2 = UNSIGNED(arg2, df);
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return u_arg2 ? u_arg1 / u_arg2 : 0;
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return arg2 ? u_arg1 / u_arg2 : -1;
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}
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static inline int64_t msa_mod_s_df(uint32_t df, int64_t arg1, int64_t arg2)
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