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apic: Cleanup for QOM'ification

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Do some cleanup, including:
1. Remove DO_UPCAST() for APICCommonState
2. Change DeviceState pointers from 'd' to 'dev', better to understand
3. Rename 'register_types' to specifically 'apic_common_register_types'

Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
This commit is contained in:
xiaoqiang zhao 2013-11-05 18:16:02 +08:00 committed by Andreas Färber
parent 6780a22cc7
commit d3b0c9e90a
3 changed files with 55 additions and 55 deletions
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8
hw/i386/kvm/apic.c
View File

@ -25,9 +25,9 @@ static inline uint32_t kvm_apic_get_reg(struct kvm_lapic_state *kapic,
return *((uint32_t *)(kapic->regs + (reg_id << 4))); return *((uint32_t *)(kapic->regs + (reg_id << 4)));
} }
void kvm_put_apic_state(DeviceState *d, struct kvm_lapic_state *kapic) void kvm_put_apic_state(DeviceState *dev, struct kvm_lapic_state *kapic)
{ {
APICCommonState *s = DO_UPCAST(APICCommonState, busdev.qdev, d); APICCommonState *s = APIC_COMMON(dev);
int i; int i;
memset(kapic, 0, sizeof(*kapic)); memset(kapic, 0, sizeof(*kapic));
@ -51,9 +51,9 @@ void kvm_put_apic_state(DeviceState *d, struct kvm_lapic_state *kapic)
kvm_apic_set_reg(kapic, 0x3e, s->divide_conf); kvm_apic_set_reg(kapic, 0x3e, s->divide_conf);
} }
void kvm_get_apic_state(DeviceState *d, struct kvm_lapic_state *kapic) void kvm_get_apic_state(DeviceState *dev, struct kvm_lapic_state *kapic)
{ {
APICCommonState *s = DO_UPCAST(APICCommonState, busdev.qdev, d); APICCommonState *s = APIC_COMMON(dev);
int i, v; int i, v;
s->id = kvm_apic_get_reg(kapic, 0x2) >> 24; s->id = kvm_apic_get_reg(kapic, 0x2) >> 24;

42
hw/intc/apic.c
View File

@ -171,9 +171,9 @@ static void apic_local_deliver(APICCommonState *s, int vector)
} }
} }
void apic_deliver_pic_intr(DeviceState *d, int level) void apic_deliver_pic_intr(DeviceState *dev, int level)
{ {
APICCommonState *s = DO_UPCAST(APICCommonState, busdev.qdev, d); APICCommonState *s = APIC_COMMON(dev);
if (level) { if (level) {
apic_local_deliver(s, APIC_LVT_LINT0); apic_local_deliver(s, APIC_LVT_LINT0);
@ -376,9 +376,9 @@ static void apic_update_irq(APICCommonState *s)
} }
} }
void apic_poll_irq(DeviceState *d) void apic_poll_irq(DeviceState *dev)
{ {
APICCommonState *s = APIC_COMMON(d); APICCommonState *s = APIC_COMMON(dev);
apic_sync_vapic(s, SYNC_FROM_VAPIC); apic_sync_vapic(s, SYNC_FROM_VAPIC);
apic_update_irq(s); apic_update_irq(s);
@ -482,9 +482,9 @@ static void apic_startup(APICCommonState *s, int vector_num)
cpu_interrupt(CPU(s->cpu), CPU_INTERRUPT_SIPI); cpu_interrupt(CPU(s->cpu), CPU_INTERRUPT_SIPI);
} }
void apic_sipi(DeviceState *d) void apic_sipi(DeviceState *dev)
{ {
APICCommonState *s = DO_UPCAST(APICCommonState, busdev.qdev, d); APICCommonState *s = APIC_COMMON(dev);
cpu_reset_interrupt(CPU(s->cpu), CPU_INTERRUPT_SIPI); cpu_reset_interrupt(CPU(s->cpu), CPU_INTERRUPT_SIPI);
@ -494,11 +494,11 @@ void apic_sipi(DeviceState *d)
s->wait_for_sipi = 0; s->wait_for_sipi = 0;
} }
static void apic_deliver(DeviceState *d, uint8_t dest, uint8_t dest_mode, static void apic_deliver(DeviceState *dev, uint8_t dest, uint8_t dest_mode,
uint8_t delivery_mode, uint8_t vector_num, uint8_t delivery_mode, uint8_t vector_num,
uint8_t trigger_mode) uint8_t trigger_mode)
{ {
APICCommonState *s = DO_UPCAST(APICCommonState, busdev.qdev, d); APICCommonState *s = APIC_COMMON(dev);
uint32_t deliver_bitmask[MAX_APIC_WORDS]; uint32_t deliver_bitmask[MAX_APIC_WORDS];
int dest_shorthand = (s->icr[0] >> 18) & 3; int dest_shorthand = (s->icr[0] >> 18) & 3;
APICCommonState *apic_iter; APICCommonState *apic_iter;
@ -551,9 +551,9 @@ static bool apic_check_pic(APICCommonState *s)
return true; return true;
} }
int apic_get_interrupt(DeviceState *d) int apic_get_interrupt(DeviceState *dev)
{ {
APICCommonState *s = DO_UPCAST(APICCommonState, busdev.qdev, d); APICCommonState *s = APIC_COMMON(dev);
int intno; int intno;
/* if the APIC is installed or enabled, we let the 8259 handle the /* if the APIC is installed or enabled, we let the 8259 handle the
@ -585,9 +585,9 @@ int apic_get_interrupt(DeviceState *d)
return intno; return intno;
} }
int apic_accept_pic_intr(DeviceState *d) int apic_accept_pic_intr(DeviceState *dev)
{ {
APICCommonState *s = DO_UPCAST(APICCommonState, busdev.qdev, d); APICCommonState *s = APIC_COMMON(dev);
uint32_t lvt0; uint32_t lvt0;
if (!s) if (!s)
@ -657,16 +657,16 @@ static void apic_mem_writew(void *opaque, hwaddr addr, uint32_t val)
static uint32_t apic_mem_readl(void *opaque, hwaddr addr) static uint32_t apic_mem_readl(void *opaque, hwaddr addr)
{ {
DeviceState *d; DeviceState *dev;
APICCommonState *s; APICCommonState *s;
uint32_t val; uint32_t val;
int index; int index;
d = cpu_get_current_apic(); dev = cpu_get_current_apic();
if (!d) { if (!dev) {
return 0; return 0;
} }
s = DO_UPCAST(APICCommonState, busdev.qdev, d); s = APIC_COMMON(dev);
index = (addr >> 4) & 0xff; index = (addr >> 4) & 0xff;
switch(index) { switch(index) {
@ -752,7 +752,7 @@ static void apic_send_msi(hwaddr addr, uint32_t data)
static void apic_mem_writel(void *opaque, hwaddr addr, uint32_t val) static void apic_mem_writel(void *opaque, hwaddr addr, uint32_t val)
{ {
DeviceState *d; DeviceState *dev;
APICCommonState *s; APICCommonState *s;
int index = (addr >> 4) & 0xff; int index = (addr >> 4) & 0xff;
if (addr > 0xfff || !index) { if (addr > 0xfff || !index) {
@ -765,11 +765,11 @@ static void apic_mem_writel(void *opaque, hwaddr addr, uint32_t val)
return; return;
} }
d = cpu_get_current_apic(); dev = cpu_get_current_apic();
if (!d) { if (!dev) {
return; return;
} }
s = DO_UPCAST(APICCommonState, busdev.qdev, d); s = APIC_COMMON(dev);
trace_apic_mem_writel(addr, val); trace_apic_mem_writel(addr, val);
@ -810,7 +810,7 @@ static void apic_mem_writel(void *opaque, hwaddr addr, uint32_t val)
break; break;
case 0x30: case 0x30:
s->icr[0] = val; s->icr[0] = val;
apic_deliver(d, (s->icr[1] >> 24) & 0xff, (s->icr[0] >> 11) & 1, apic_deliver(dev, (s->icr[1] >> 24) & 0xff, (s->icr[0] >> 11) & 1,
(s->icr[0] >> 8) & 7, (s->icr[0] & 0xff), (s->icr[0] >> 8) & 7, (s->icr[0] & 0xff),
(s->icr[0] >> 15) & 1); (s->icr[0] >> 15) & 1);
break; break;

60
hw/intc/apic_common.c
View File

@ -27,21 +27,21 @@
static int apic_irq_delivered; static int apic_irq_delivered;
bool apic_report_tpr_access; bool apic_report_tpr_access;
void cpu_set_apic_base(DeviceState *d, uint64_t val) void cpu_set_apic_base(DeviceState *dev, uint64_t val)
{ {
trace_cpu_set_apic_base(val); trace_cpu_set_apic_base(val);
if (d) { if (dev) {
APICCommonState *s = APIC_COMMON(d); APICCommonState *s = APIC_COMMON(dev);
APICCommonClass *info = APIC_COMMON_GET_CLASS(s); APICCommonClass *info = APIC_COMMON_GET_CLASS(s);
info->set_base(s, val); info->set_base(s, val);
} }
} }
uint64_t cpu_get_apic_base(DeviceState *d) uint64_t cpu_get_apic_base(DeviceState *dev)
{ {
if (d) { if (dev) {
APICCommonState *s = APIC_COMMON(d); APICCommonState *s = APIC_COMMON(dev);
trace_cpu_get_apic_base((uint64_t)s->apicbase); trace_cpu_get_apic_base((uint64_t)s->apicbase);
return s->apicbase; return s->apicbase;
} else { } else {
@ -50,39 +50,39 @@ uint64_t cpu_get_apic_base(DeviceState *d)
} }
} }
void cpu_set_apic_tpr(DeviceState *d, uint8_t val) void cpu_set_apic_tpr(DeviceState *dev, uint8_t val)
{ {
APICCommonState *s; APICCommonState *s;
APICCommonClass *info; APICCommonClass *info;
if (!d) { if (!dev) {
return; return;
} }
s = APIC_COMMON(d); s = APIC_COMMON(dev);
info = APIC_COMMON_GET_CLASS(s); info = APIC_COMMON_GET_CLASS(s);
info->set_tpr(s, val); info->set_tpr(s, val);
} }
uint8_t cpu_get_apic_tpr(DeviceState *d) uint8_t cpu_get_apic_tpr(DeviceState *dev)
{ {
APICCommonState *s; APICCommonState *s;
APICCommonClass *info; APICCommonClass *info;
if (!d) { if (!dev) {
return 0; return 0;
} }
s = APIC_COMMON(d); s = APIC_COMMON(dev);
info = APIC_COMMON_GET_CLASS(s); info = APIC_COMMON_GET_CLASS(s);
return info->get_tpr(s); return info->get_tpr(s);
} }
void apic_enable_tpr_access_reporting(DeviceState *d, bool enable) void apic_enable_tpr_access_reporting(DeviceState *dev, bool enable)
{ {
APICCommonState *s = DO_UPCAST(APICCommonState, busdev.qdev, d); APICCommonState *s = APIC_COMMON(dev);
APICCommonClass *info = APIC_COMMON_GET_CLASS(s); APICCommonClass *info = APIC_COMMON_GET_CLASS(s);
apic_report_tpr_access = enable; apic_report_tpr_access = enable;
@ -91,19 +91,19 @@ void apic_enable_tpr_access_reporting(DeviceState *d, bool enable)
} }
} }
void apic_enable_vapic(DeviceState *d, hwaddr paddr) void apic_enable_vapic(DeviceState *dev, hwaddr paddr)
{ {
APICCommonState *s = DO_UPCAST(APICCommonState, busdev.qdev, d); APICCommonState *s = APIC_COMMON(dev);
APICCommonClass *info = APIC_COMMON_GET_CLASS(s); APICCommonClass *info = APIC_COMMON_GET_CLASS(s);
s->vapic_paddr = paddr; s->vapic_paddr = paddr;
info->vapic_base_update(s); info->vapic_base_update(s);
} }
void apic_handle_tpr_access_report(DeviceState *d, target_ulong ip, void apic_handle_tpr_access_report(DeviceState *dev, target_ulong ip,
TPRAccess access) TPRAccess access)
{ {
APICCommonState *s = DO_UPCAST(APICCommonState, busdev.qdev, d); APICCommonState *s = APIC_COMMON(dev);
vapic_report_tpr_access(s->vapic, CPU(s->cpu), ip, access); vapic_report_tpr_access(s->vapic, CPU(s->cpu), ip, access);
} }
@ -129,9 +129,9 @@ int apic_get_irq_delivered(void)
return apic_irq_delivered; return apic_irq_delivered;
} }
void apic_deliver_nmi(DeviceState *d) void apic_deliver_nmi(DeviceState *dev)
{ {
APICCommonState *s = APIC_COMMON(d); APICCommonState *s = APIC_COMMON(dev);
APICCommonClass *info = APIC_COMMON_GET_CLASS(s); APICCommonClass *info = APIC_COMMON_GET_CLASS(s);
info->external_nmi(s); info->external_nmi(s);
@ -170,9 +170,9 @@ bool apic_next_timer(APICCommonState *s, int64_t current_time)
return true; return true;
} }
void apic_init_reset(DeviceState *d) void apic_init_reset(DeviceState *dev)
{ {
APICCommonState *s = DO_UPCAST(APICCommonState, busdev.qdev, d); APICCommonState *s = APIC_COMMON(dev);
int i; int i;
if (!s) { if (!s) {
@ -203,19 +203,19 @@ void apic_init_reset(DeviceState *d)
s->timer_expiry = -1; s->timer_expiry = -1;
} }
void apic_designate_bsp(DeviceState *d) void apic_designate_bsp(DeviceState *dev)
{ {
if (d == NULL) { if (dev == NULL) {
return; return;
} }
APICCommonState *s = APIC_COMMON(d); APICCommonState *s = APIC_COMMON(dev);
s->apicbase |= MSR_IA32_APICBASE_BSP; s->apicbase |= MSR_IA32_APICBASE_BSP;
} }
static void apic_reset_common(DeviceState *d) static void apic_reset_common(DeviceState *dev)
{ {
APICCommonState *s = DO_UPCAST(APICCommonState, busdev.qdev, d); APICCommonState *s = APIC_COMMON(dev);
APICCommonClass *info = APIC_COMMON_GET_CLASS(s); APICCommonClass *info = APIC_COMMON_GET_CLASS(s);
bool bsp; bool bsp;
@ -226,7 +226,7 @@ static void apic_reset_common(DeviceState *d)
s->vapic_paddr = 0; s->vapic_paddr = 0;
info->vapic_base_update(s); info->vapic_base_update(s);
apic_init_reset(d); apic_init_reset(dev);
if (bsp) { if (bsp) {
/* /*
@ -404,9 +404,9 @@ static const TypeInfo apic_common_type = {
.abstract = true, .abstract = true,
}; };
static void register_types(void) static void apic_common_register_types(void)
{ {
type_register_static(&apic_common_type); type_register_static(&apic_common_type);
} }
type_init(register_types) type_init(apic_common_register_types)