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target-m68k: add addressing modes to scc

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Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Richard Henderson <rth@twiddle.net>
This commit is contained in:
Laurent Vivier 2016-01-10 23:53:20 +01:00
parent 29cf437da4
commit d5a3cf33f2
1 changed files with 20 additions and 20 deletions
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40
target-m68k/translate.c
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@ -1008,25 +1008,6 @@ static void gen_jmpcc(DisasContext *s, int cond, TCGLabel *l1)
free_cond(&c);
}
DISAS_INSN(scc)
{
DisasCompare c;
int cond;
TCGv reg, tmp;
cond = (insn >> 8) & 0xf;
gen_cc_cond(&c, s, cond);
tmp = tcg_temp_new();
tcg_gen_setcond_i32(c.tcond, tmp, c.v1, c.v2);
free_cond(&c);
reg = DREG(insn, 0);
tcg_gen_neg_i32(tmp, tmp);
tcg_gen_deposit_i32(reg, reg, tmp, 0, 8);
tcg_temp_free(tmp);
}
/* Force a TB lookup after an instruction that changes the CPU state. */
static void gen_lookup_tb(DisasContext *s)
{
@ -1106,6 +1087,24 @@ static void gen_jmp_tb(DisasContext *s, int n, uint32_t dest)
s->is_jmp = DISAS_TB_JUMP;
}
DISAS_INSN(scc)
{
DisasCompare c;
int cond;
TCGv tmp;
cond = (insn >> 8) & 0xf;
gen_cc_cond(&c, s, cond);
tmp = tcg_temp_new();
tcg_gen_setcond_i32(c.tcond, tmp, c.v1, c.v2);
free_cond(&c);
tcg_gen_neg_i32(tmp, tmp);
DEST_EA(env, insn, OS_BYTE, tmp, NULL);
tcg_temp_free(tmp);
}
DISAS_INSN(undef_mac)
{
gen_exception(s, s->pc - 2, EXCP_LINEA);
@ -3136,7 +3135,8 @@ void register_m68k_insns (CPUM68KState *env)
INSN(jump, 4ec0, ffc0, M68000);
INSN(addsubq, 5000, f080, M68000);
INSN(addsubq, 5080, f0c0, M68000);
INSN(scc, 50c0, f0f8, CF_ISA_A);
INSN(scc, 50c0, f0f8, CF_ISA_A); /* Scc.B Dx */
INSN(scc, 50c0, f0c0, M68000); /* Scc.B <EA> */
INSN(addsubq, 5080, f1c0, CF_ISA_A);
INSN(tpf, 51f8, fff8, CF_ISA_A);