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target/cris: Use env_cpu, env_archcpu

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Cleanup in the boilerplate that each target must define.
Replace cris_env_get_cpu with env_archcpu.  The combination
CPU(cris_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2019-03-22 17:46:40 -07:00
parent ac4df09f91
commit dbefca236a
5 changed files with 6 additions and 16 deletions
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2
linux-user/cris/cpu_loop.c
View File

@ -23,7 +23,7 @@
void cpu_loop(CPUCRISState *env)
{
CPUState *cs = CPU(cris_env_get_cpu(env));
CPUState *cs = env_cpu(env);
int trapnr, ret;
target_siginfo_t info;

5
target/cris/cpu.h
View File

@ -183,11 +183,6 @@ struct CRISCPU {
CPUCRISState env;
};
static inline CRISCPU *cris_env_get_cpu(CPUCRISState *env)
{
return container_of(env, CRISCPU, env);
}
#define ENV_OFFSET offsetof(CRISCPU, env)
#ifndef CONFIG_USER_ONLY

3
target/cris/mmu.c
View File

@ -288,7 +288,6 @@ static int cris_mmu_translate_page(struct cris_mmu_result *res,
void cris_mmu_flush_pid(CPUCRISState *env, uint32_t pid)
{
CRISCPU *cpu = cris_env_get_cpu(env);
target_ulong vaddr;
unsigned int idx;
uint32_t lo, hi;
@ -312,7 +311,7 @@ void cris_mmu_flush_pid(CPUCRISState *env, uint32_t pid)
if (tlb_v && !tlb_g && (tlb_pid == pid)) {
vaddr = tlb_vpn << TARGET_PAGE_BITS;
D_LOG("flush pid=%x vaddr=%x\n", pid, vaddr);
tlb_flush_page(CPU(cpu), vaddr);
tlb_flush_page(env_cpu(env), vaddr);
}
}
}

10
target/cris/op_helper.c
View File

@ -39,7 +39,7 @@
void helper_raise_exception(CPUCRISState *env, uint32_t index)
{
CPUState *cs = CPU(cris_env_get_cpu(env));
CPUState *cs = env_cpu(env);
cs->exception_index = index;
cpu_loop_exit(cs);
@ -58,8 +58,7 @@ void helper_tlb_flush_pid(CPUCRISState *env, uint32_t pid)
void helper_spc_write(CPUCRISState *env, uint32_t new_spc)
{
#if !defined(CONFIG_USER_ONLY)
CRISCPU *cpu = cris_env_get_cpu(env);
CPUState *cs = CPU(cpu);
CPUState *cs = env_cpu(env);
tlb_flush_page(cs, env->pregs[PR_SPC]);
tlb_flush_page(cs, new_spc);
@ -72,9 +71,6 @@ void helper_spc_write(CPUCRISState *env, uint32_t new_spc)
void helper_movl_sreg_reg(CPUCRISState *env, uint32_t sreg, uint32_t reg)
{
#if !defined(CONFIG_USER_ONLY)
CRISCPU *cpu = cris_env_get_cpu(env);
#endif
uint32_t srs;
srs = env->pregs[PR_SRS];
srs &= 3;
@ -112,7 +108,7 @@ void helper_movl_sreg_reg(CPUCRISState *env, uint32_t sreg, uint32_t reg)
D_LOG("tlb flush vaddr=%x v=%d pc=%x\n",
vaddr, tlb_v, env->pc);
if (tlb_v) {
tlb_flush_page(CPU(cpu), vaddr);
tlb_flush_page(env_cpu(env), vaddr);
}
}
}

2
target/cris/translate.c
View File

@ -3097,7 +3097,7 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
* delayslot, like in real hw.
*/
pc_start = tb->pc & ~1;
dc->cpu = cris_env_get_cpu(env);
dc->cpu = env_archcpu(env);
dc->tb = tb;
dc->is_jmp = DISAS_NEXT;