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hw/pxa2xx_timer: Explicitly mark fallthroughs
Explicitly mark the fallthroughs as intentional in the code pattern where we gradually increment an index before falling into the code to read/write that array entry: case THINGY_3: idx++; case THINGY_2: idx++; case THINGY_1: idx++; case THINGY_0: return s->thingy[idx]; This makes static analysers happy. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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@ -157,17 +157,27 @@ static uint64_t pxa2xx_timer_read(void *opaque, hwaddr offset,
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switch (offset) {
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case OSMR3: tm ++;
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/* fall through */
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case OSMR2: tm ++;
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/* fall through */
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case OSMR1: tm ++;
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/* fall through */
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case OSMR0:
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return s->timer[tm].value;
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case OSMR11: tm ++;
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/* fall through */
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case OSMR10: tm ++;
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/* fall through */
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case OSMR9: tm ++;
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/* fall through */
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case OSMR8: tm ++;
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/* fall through */
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case OSMR7: tm ++;
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/* fall through */
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case OSMR6: tm ++;
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/* fall through */
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case OSMR5: tm ++;
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/* fall through */
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case OSMR4:
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if (!pxa2xx_timer_has_tm4(s))
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goto badreg;
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@ -176,12 +186,19 @@ static uint64_t pxa2xx_timer_read(void *opaque, hwaddr offset,
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return s->clock + muldiv64(qemu_get_clock_ns(vm_clock) -
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s->lastload, s->freq, get_ticks_per_sec());
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case OSCR11: tm ++;
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/* fall through */
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case OSCR10: tm ++;
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/* fall through */
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case OSCR9: tm ++;
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/* fall through */
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case OSCR8: tm ++;
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/* fall through */
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case OSCR7: tm ++;
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/* fall through */
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case OSCR6: tm ++;
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/* fall through */
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case OSCR5: tm ++;
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/* fall through */
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case OSCR4:
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if (!pxa2xx_timer_has_tm4(s))
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goto badreg;
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@ -207,12 +224,19 @@ static uint64_t pxa2xx_timer_read(void *opaque, hwaddr offset,
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case OWER:
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return s->reset3;
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case OMCR11: tm ++;
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/* fall through */
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case OMCR10: tm ++;
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/* fall through */
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case OMCR9: tm ++;
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/* fall through */
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case OMCR8: tm ++;
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/* fall through */
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case OMCR7: tm ++;
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/* fall through */
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case OMCR6: tm ++;
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/* fall through */
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case OMCR5: tm ++;
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/* fall through */
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case OMCR4:
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if (!pxa2xx_timer_has_tm4(s))
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goto badreg;
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@ -235,19 +259,29 @@ static void pxa2xx_timer_write(void *opaque, hwaddr offset,
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switch (offset) {
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case OSMR3: tm ++;
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/* fall through */
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case OSMR2: tm ++;
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/* fall through */
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case OSMR1: tm ++;
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/* fall through */
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case OSMR0:
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s->timer[tm].value = value;
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pxa2xx_timer_update(s, qemu_get_clock_ns(vm_clock));
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break;
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case OSMR11: tm ++;
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/* fall through */
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case OSMR10: tm ++;
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/* fall through */
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case OSMR9: tm ++;
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/* fall through */
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case OSMR8: tm ++;
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/* fall through */
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case OSMR7: tm ++;
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/* fall through */
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case OSMR6: tm ++;
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/* fall through */
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case OSMR5: tm ++;
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/* fall through */
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case OSMR4:
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if (!pxa2xx_timer_has_tm4(s))
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goto badreg;
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@ -261,12 +295,19 @@ static void pxa2xx_timer_write(void *opaque, hwaddr offset,
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pxa2xx_timer_update(s, s->lastload);
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break;
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case OSCR11: tm ++;
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/* fall through */
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case OSCR10: tm ++;
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/* fall through */
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case OSCR9: tm ++;
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/* fall through */
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case OSCR8: tm ++;
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/* fall through */
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case OSCR7: tm ++;
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/* fall through */
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case OSCR6: tm ++;
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/* fall through */
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case OSCR5: tm ++;
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/* fall through */
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case OSCR4:
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if (!pxa2xx_timer_has_tm4(s))
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goto badreg;
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@ -291,8 +332,11 @@ static void pxa2xx_timer_write(void *opaque, hwaddr offset,
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s->reset3 = value;
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break;
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case OMCR7: tm ++;
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/* fall through */
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case OMCR6: tm ++;
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/* fall through */
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case OMCR5: tm ++;
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/* fall through */
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case OMCR4:
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if (!pxa2xx_timer_has_tm4(s))
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goto badreg;
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@ -306,8 +350,11 @@ static void pxa2xx_timer_write(void *opaque, hwaddr offset,
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}
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break;
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case OMCR11: tm ++;
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/* fall through */
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case OMCR10: tm ++;
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/* fall through */
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case OMCR9: tm ++;
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/* fall through */
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case OMCR8: tm += 4;
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if (!pxa2xx_timer_has_tm4(s))
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goto badreg;
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