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target-arm/translate-a64.c: Correct unallocated checks for ldst_excl
The checks for the unallocated encodings in the ldst_excl group (exclusives and load-acquire/store-release) were not correct. This error meant that in turn we ended up with code attempting to handle the non-existent case of "non-exclusive load-acquire/store-release pair". Delete that broken and now unreachable code. Reported-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Laurent Desnogues <laurent.desnogues@gmail.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com>
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@ -1816,9 +1816,6 @@ static void gen_store_exclusive(DisasContext *s, int rd, int rt, int rt2,
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* o2: 0 -> exclusive, 1 -> not
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* o1: 0 -> single register, 1 -> register pair
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* o0: 1 -> load-acquire/store-release, 0 -> not
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*
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* o0 == 0 AND o2 == 1 is un-allocated
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* o1 == 1 is un-allocated except for 32 and 64 bit sizes
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*/
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static void disas_ldst_excl(DisasContext *s, uint32_t insn)
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{
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@ -1833,7 +1830,8 @@ static void disas_ldst_excl(DisasContext *s, uint32_t insn)
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int size = extract32(insn, 30, 2);
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TCGv_i64 tcg_addr;
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if ((!is_excl && !is_lasr) ||
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if ((!is_excl && !is_pair && !is_lasr) ||
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(!is_excl && is_pair) ||
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(is_pair && size < 2)) {
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unallocated_encoding(s);
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return;
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@ -1862,15 +1860,6 @@ static void disas_ldst_excl(DisasContext *s, uint32_t insn)
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} else {
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do_gpr_ld(s, tcg_rt, tcg_addr, size, false, false);
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}
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if (is_pair) {
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TCGv_i64 tcg_rt2 = cpu_reg(s, rt);
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tcg_gen_addi_i64(tcg_addr, tcg_addr, 1 << size);
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if (is_store) {
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do_gpr_st(s, tcg_rt2, tcg_addr, size);
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} else {
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do_gpr_ld(s, tcg_rt2, tcg_addr, size, false, false);
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}
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}
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}
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}
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