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target/mips: Clean up handling of CP0 register 13

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Clean up handling of CP0 register 13.

Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <1567009614-12438-15-git-send-email-aleksandar.markovic@rt-rk.com>
This commit is contained in:
Aleksandar Markovic 2019-08-28 18:26:38 +02:00
parent 2b0848674b
commit e3c7559d89
2 changed files with 6 additions and 4 deletions
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2
target/mips/cpu.h
View File

@ -357,6 +357,8 @@ typedef struct mips_def_t mips_def_t;
#define CP0_REG12__GTOFFSET 7
/* CP0 Register 13 */
#define CP0_REG13__CAUSE 0
#define CP0_REG13__VIEW_RIPL 4
#define CP0_REG13__NESTEDEXC 5
/* CP0 Register 14 */
#define CP0_REG14__EPC 0
/* CP0 Register 15 */

8
target/mips/translate.c
View File

@ -7202,7 +7202,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break;
case CP0_REGISTER_13:
switch (sel) {
case 0:
case CP0_REG13__CAUSE:
gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Cause));
register_name = "Cause";
break;
@ -7928,7 +7928,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break;
case CP0_REGISTER_13:
switch (sel) {
case 0:
case CP0_REG13__CAUSE:
save_cpu_state(ctx, 1);
gen_helper_mtc0_cause(cpu_env, arg);
/*
@ -8677,7 +8677,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break;
case CP0_REGISTER_13:
switch (sel) {
case 0:
case CP0_REG13__CAUSE:
gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Cause));
register_name = "Cause";
break;
@ -9391,7 +9391,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break;
case CP0_REGISTER_13:
switch (sel) {
case 0:
case CP0_REG13__CAUSE:
save_cpu_state(ctx, 1);
gen_helper_mtc0_cause(cpu_env, arg);
/*