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PPC: Add support for MSR_CM
The BookE variant of MSR_SF is MSR_CM. Implement everything it takes in TCG to support running 64bit code with MSR_CM set. Signed-off-by: Alexander Graf <agraf@suse.de>
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@ -2212,6 +2212,15 @@ static inline uint32_t booke206_tlbnps(CPUPPCState *env, const int tlbn)
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#endif
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#endif
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static inline bool msr_is_64bit(CPUPPCState *env, target_ulong msr)
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{
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if (env->mmu_model == POWERPC_MMU_BOOKE206) {
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return msr & (1ULL << MSR_CM);
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}
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return msr & (1ULL << MSR_SF);
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}
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extern void (*cpu_ppc_hypercall)(CPUPPCState *);
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extern void (*cpu_ppc_hypercall)(CPUPPCState *);
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static inline bool cpu_has_work(CPUPPCState *env)
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static inline bool cpu_has_work(CPUPPCState *env)
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@ -608,10 +608,11 @@ static inline void powerpc_excp(CPUPPCState *env, int excp_model, int excp)
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vector |= env->excp_prefix;
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vector |= env->excp_prefix;
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#if defined(TARGET_PPC64)
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#if defined(TARGET_PPC64)
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if (excp_model == POWERPC_EXCP_BOOKE) {
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if (excp_model == POWERPC_EXCP_BOOKE) {
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if (!msr_icm) {
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if (env->spr[SPR_BOOKE_EPCR] & EPCR_ICM) {
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vector = (uint32_t)vector;
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/* Cat.64-bit: EPCR.ICM is copied to MSR.CM */
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} else {
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new_msr |= (target_ulong)1 << MSR_CM;
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new_msr |= (target_ulong)1 << MSR_CM;
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} else {
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vector = (uint32_t)vector;
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}
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}
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} else {
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} else {
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if (!msr_isf && !(env->mmu_model & POWERPC_MMU_64)) {
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if (!msr_isf && !(env->mmu_model & POWERPC_MMU_64)) {
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@ -803,7 +804,7 @@ static inline void do_rfi(CPUPPCState *env, target_ulong nip, target_ulong msr,
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target_ulong msrm, int keep_msrh)
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target_ulong msrm, int keep_msrh)
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{
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{
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#if defined(TARGET_PPC64)
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#if defined(TARGET_PPC64)
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if (msr & (1ULL << MSR_SF)) {
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if (msr_is_64bit(env, msr)) {
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nip = (uint64_t)nip;
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nip = (uint64_t)nip;
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msr &= (uint64_t)msrm;
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msr &= (uint64_t)msrm;
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} else {
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} else {
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@ -35,7 +35,7 @@ static inline target_ulong addr_add(CPUPPCState *env, target_ulong addr,
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target_long arg)
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target_long arg)
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{
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{
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#if defined(TARGET_PPC64)
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#if defined(TARGET_PPC64)
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if (!msr_sf) {
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if (!msr_is_64bit(env, env->msr)) {
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return (uint32_t)(addr + arg);
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return (uint32_t)(addr + arg);
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} else
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} else
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#endif
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#endif
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@ -9626,7 +9626,7 @@ static inline void gen_intermediate_code_internal(CPUPPCState *env,
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ctx.access_type = -1;
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ctx.access_type = -1;
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ctx.le_mode = env->hflags & (1 << MSR_LE) ? 1 : 0;
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ctx.le_mode = env->hflags & (1 << MSR_LE) ? 1 : 0;
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#if defined(TARGET_PPC64)
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#if defined(TARGET_PPC64)
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ctx.sf_mode = msr_sf;
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ctx.sf_mode = msr_is_64bit(env, env->msr);
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ctx.has_cfar = !!(env->flags & POWERPC_FLAG_CFAR);
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ctx.has_cfar = !!(env->flags & POWERPC_FLAG_CFAR);
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#endif
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#endif
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ctx.fpu_enabled = msr_fp;
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ctx.fpu_enabled = msr_fp;
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